IDT5T93GL161PFI IDT, Integrated Device Technology Inc, IDT5T93GL161PFI Datasheet - Page 11

• Manufacturer Part Number: IDT5T93GL161PFI
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Clock Driverr

Specifications of IDT5T93GL161PFI

• Number Of Clock Inputs: 2
• Mode Of Operation: Differential
• Output Frequency: 450MHz
• Output Logic Level: LVDS
• Operating Supply Voltage (min): 2.3V
• Operating Supply Voltage (typ): 2.5V
• Operating Supply Voltage (max): 2.7V
• Package Type: TQFP
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 64
• Quiescent Current: 350mA
• Lead Free Status / RoHS Status: Not Compliant

Glitchless Output Operation with Switching Input Clock Selection
1. When SEL changes, the output clock goes LOW on the falling edge of the output clock up to three cycles later. The output then stays
LOW for up to three clock cycles of the new input clock. After this, the output starts with the rising edge of the new input clock.
2. AC propagation measurements should not be taken within the first 100 cycles of startup.
FSEL Operation for When Current Clock Dies
1. When the differential on the selected clock goes below the minimum DC differential, the outputs clock goes to an unknown state. When
this happens, the SEL pin should be toggled and FSEL asserted in order to force selection of the new input clock. The output clock will
start up after a number of cycles of the newly-selected input clock.
2. The FSEL pin should stay asserted until the problem with the dead clock can be fixed in the system.
3. It is recommended that the FSEL be tied HIGH for systems that use only one input. If this is not possible, the user must guarantee that
the unused input have a differential greater than or equal to the minimum DC differential specified in the datasheet.
IDT™ LVDS GLITCHLESS CLOCK BUFFER TERABUFFER™ II
Qn - Qn
IDT5T93GL161
2.5V LVDS 1:16 GLITCHLESS CLOCK BUFFER TERABUFFER™ II
A
A
2
1
SEL
- A
- A
1
2
11
IDT5T93GL161 REV. A SEPTEMBER 12, 2008
+ V
V
- V
+ V
V
- V
V
V
V
+ V
V
- V
DIF
DIF
IH
THI
IL
DIF
DIF
DIF
DIF
DIF
DIF
DIF
= 0
= 0
= 0