UJA1065TW/3V3-T NXP Semiconductors, UJA1065TW/3V3-T Datasheet - Page 43
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UJA1065TW/3V3-T
Manufacturer Part Number
UJA1065TW/3V3-T
Description
Network Controller & Processor ICs HI SPEED CAN SYSTEM
Manufacturer
NXP Semiconductors
Datasheet
1.UJA1065TW3V3-T.pdf
(76 pages)
Specifications of UJA1065TW/3V3-T
Number Of Transceivers
1
Power Down Mode
Standby
Operating Supply Voltage (min)
5.5V
Supply Current
10mA
Operating Temperature (max)
125C
Operating Temperature (min)
-40C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Product
Controller Area Network (CAN)
Data Rate
20 Kbps
Supply Voltage (max)
27 V, 52 V
Supply Voltage (min)
5.5 V
Supply Current (max)
10 mA
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Package / Case
HTSSOP EP
Lead Free Status / RoHS Status
Compliant
Other names
UJA1065TW/3V3,518
NXP Semiconductors
Table 20.
Table 21.
UJA1065_7
Product data sheet
Symbol
GSTHC
RLC
V3C
V1CMC
WEN
WSC
ILEN
ILC
Symbol
V2C
CPNC
COTC
CTC
CRC
CMC
CSC
LMC
LSC
LDC
LWEN
LTC
System Configuration register and System Configuration Feedback register: status at reset
Physical Layer Control register and Physical Layer Control Feedback register: status at reset
Name
GND Shift level
Threshold Control
Reset Length Control
V3 Control
V1 Current Monitor
Control
Wake Enable
Wake Sample Control
INH/LIMP Enable
INH/LIMP Control
Name
V2 Control
CAN Partial Networking
Control
CAN Off-line Time
Control
CAN Transmitter
Control
CAN Receiver Control
CAN Mode Control
CAN Split Control
LIN Mode Control
LIN Slope Control
LIN Driver Control
LIN Wake-up Enable
LIN Transmitter Control 0 (on)
Power-on
0 (normal)
0 (short)
00 (off)
0 (watchdog
restart)
1 (enabled)
0 (control)
0 (floating)
0 (LOW)
Power-on
0 (auto)
0 (On-line Listen
mode disabled)
1 (long)
0 (on)
0 (normal)
0 (Active mode
disabled)
0 (off)
0 (Active mode
disabled)
0 (normal)
0 (LIN 2.0)
1 (enabled)
Rev. 07 — 25 February 2010
Start-up
no change
no change
no change
no change
no change
no change
see
if ILC = 1,
otherwise no change
no change
Start-up
no change
0 if reset is caused
by a CAN wake-up,
otherwise no change
no change
no change
no change
no change
no change
no change
no change
no change
no change
no change
Figure 13
High-speed CAN/LIN fail-safe system basis chip
Restart
no change
1 (long)
no change
no change
no change
no change
0 (floating) if ILC = 1,
otherwise no change
no change
Restart
no change
no change
no change
no change
no change
no change
no change
no change
no change
no change
no change
no change
UJA1065
© NXP B.V. 2010. All rights reserved.
Fail-Safe
no change
1 (long)
no change
no change
no change
no change
1 (active)
0 (LOW)
Fail-Safe
0 (auto)
0 (On-line Listen
mode disabled)
no change
no change
no change
no change
no change
no change
no change
no change
no change
no change
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