DJLXT386LE.B2 S E001 Intel, DJLXT386LE.B2 S E001 Datasheet - Page 58

• Manufacturer Part Number: DJLXT386LE.B2 S E001
• Manufacturer: Intel

Specifications of DJLXT386LE.B2 S E001

• Lead Free Status / RoHS Status: Not Compliant

LXT386 — QUAD T1/E1/J1 Transceiver
5.5.3
58
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Table 33. Instruction Register – IR
Figure 17. Analog Test Port Application
INTEST_ANALOG
Instruction
BYPASS
EXTEST
IDCODE
Instruction Register (IR)
The IR is a 3 bit shift register that loads the instruction to be performed. The instructions are shifted
LSB first.
1K
1K
RRING2
TRING2
Table 33
AT2
AT1
RRING3
TRING3
RTIP2
TTIP2
Code #
RTIP3
RRING0
RTIP0
TTIP3
000
010
100
110
111
shows the valid instruction codes and the corresponding instruction description.
Connects the BSR to TDI and TDO. Input pins values are loaded into the BSR.
Output pins values are loaded from the BSR.
Connects the ASR to TDI and TDO. Allows voltage forcing/sensing through AT1 and
AT2. Refer to
Connects the BSR to TDI and TDO. The normal path between the LXT386 logic and
the I/O pins is maintained. The BSR is loaded with the signals in the I/O pins.
Connects the IDR to the TDO pin.
Serial data from the TDI input is passed to the TDO output through the 1 bit Bypass
Register.
Table
Transceiver 3
Transceiver 2
Transceiver 0
32.
ASR Register
JTAG Port
Comments
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