82V2088BBG IDT, Integrated Device Technology Inc, 82V2088BBG Datasheet
82V2088BBG
Specifications of 82V2088BBG
Related parts for 82V2088BBG
82V2088BBG Summary of contents
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FEATURES: • Eight channel T1/E1/J1 long haul/short haul line interfaces • Supports HPS (Hitless Protection Switching) for 1+1 protection without external relays • Receiver sensitivity exceeds -36 dB@772KHz and -43 dB@1024 KHz • Programmable T1/E1/J1 switchability allowing one bill of ...
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OCTAL CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT FUNCTIONAL BLOCK DIAGRAM Figure-1 Block Diagram 2 INDUSTRIAL TEMPERATURE RANGES TDO TDI TMS TCK TRST RST REF THZ SCLKE INT/MOT P/S A[7:0] D[7:0] INT SDO SDI/R/W/WR DS/RD SCLK CS MCLKS MCLK ...
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OCTAL CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT TABLE OF CONTENTS TABLE OF CONTENTS 1 IDT82V2088 PIN CONFIGURATIONS .......................................................................................... 8 2 PIN DESCRIPTION ..................................................................................................................... 10 3 FUNCTIONAL DESCRIPTION .................................................................................................... 16 3.1 T1/E1/J1 MODE SELECTION .......................................................................................... 16 3.2 TRANSMIT PATH ...
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OCTAL CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT 3.8 ERROR DETECTION/COUNTING AND INSERTION ...................................................... 31 3.8.1 DEFINITION OF LINE CODING ERROR ............................................................... 31 3.8.2 ERROR DETECTION AND COUNTING ................................................................ 31 3.8.3 BIPOLAR VIOLATION AND PRBS ERROR INSERTION ...................................... 32 ...
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OCTAL CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT LIST OF TABLES Table-1 Pin Description .............................................................................................................. 10 Transmit Waveform Value For E1 75 Ω ........................................................................ 18 Table-2 Transmit Waveform Value For E1 120 Ω ...................................................................... 18 Table-3 Table-4 Transmit Waveform ...
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OCTAL CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT Table-41 MAINT1: Maintenance Function Control Register 1...................................................... 46 Table-42 MAINT2: Maintenance Function Control Register 2...................................................... 46 Table-43 MAINT3: Maintenance Function Control Register 3...................................................... 46 Table-44 MAINT4: Maintenance Function Control Register 4...................................................... ...
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OCTAL CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT LIST OF FIGURES Figure-1 Block Diagram ................................................................................................................. 2 Figure-2 IDT82V2088 PQFP208 Package Pin Assignment .......................................................... 8 Figure-3 IDT82V2088 PBGA208 Package Pin Assignment (top view) ......................................... 9 Figure-4 E1 Waveform Template Diagram ...
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OCTAL CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT 1 IDT82V2088 PIN CONFIGURATIONS GNDIO 157 VDDIO 158 NC 159 NC 160 VDDT1 161 VDDT1 162 TRING1 163 TTIP1 164 165 GNDT1 GNDT1 166 GNDR1 167 168 RRING1 RTIP1 169 170 ...
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OCTAL CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT IDT82V2088 PIN CONFIGURATIONS (CONTINUED GNDA GNDT4 TTIP4 VDDT4 B SCLKE GNDT4 TRING4 VDDT4 C VDDA LOS1 LOS2 VDDR4 D LOS3 LOS4 LOS5 VDDR3 E LOS6 LOS7 ...
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OCTAL CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT 2 PIN DESCRIPTION Table-1 Pin Description Name Type Pin No. PQFP208 TTIP1 164 TTIP2 177 TTIP3 184 TTIP4 197 TTIP5 64 TTIP6 77 TTIP7 84 TTIP8 97 Output Analog TRING1 163 ...
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OCTAL CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT Table-1 Pin Description (Continued) Name Type Pin No. PQFP208 TD1/TDP1 155 TD2/TDP2 149 TD3/TDP3 143 TD4/TDP4 137 TD5/TDP5 127 TD6/TDP6 121 TD7/TDP7 115 TD8/TDP8 109 Input TDN1 154 TDN2 148 TDN3 ...
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OCTAL CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT Table-1 Pin Description (Continued) Name Type Pin No. PQFP208 MCLK Input 17 MCLKS Input 56 LOS1 1 LOS2 3 LOS3 4 LOS4 5 Output LOS5 6 LOS6 7 LOS7 8 LOS8 ...
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OCTAL CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT Table-1 Pin Description (Continued) Name Type Pin No. PQFP208 Input 47 DS/RD SDI/R/W/WR Input 48 SDO Output 49 INT Output ...
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OCTAL CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT Table-1 Pin Description (Continued) Name Type Pin No. PQFP208 SCLKE Input 11 TRST Input 204 Pullup TMS Input 205 Pullup TCK Input 208 TDO Output 207 TDI Input 206 Pullup VDDIO ...
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OCTAL CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT Table-1 Pin Description (Continued) Name Type Pin No. PQFP208 GNDA - 57, 203 VDDD - 15, 133 GNDD - 19, 131 VDDR1 - 170 VDDR2 171 VDDR3 190 VDDR4 191 VDDR5 ...
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OCTAL CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT 3 FUNCTIONAL DESCRIPTION 3.1 T1/E1/J1 MODE SELECTION The IDT82V2088 can be used as an eight-channel E1 LIU or an eight- channel T1/J1 LIU application, the T1E1 bit (GCF0, 40H) ...
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OCTAL CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT TTIPn IDT82V2088 TRINGn = 100 Ω ± 5% Note: R LOAD Figure-7 T1 Pulse Template Test Circuit For J1 applications, the PULS[3:0] (TCF1, 03H...) should be set to ‘0111’. Table-14 lists ...
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OCTAL CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT Table-2 Transmit Waveform Value For E1 75 Ω Sample 0000000 0000000 2 0000000 0000000 3 0000000 0000000 4 0001100 0000000 5 0110000 0000000 6 0110000 0000000 ...
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OCTAL CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT Table-6 Transmit Waveform Value For T1 266~399 ft Sample 0011111 1000011 2 0110100 1000010 3 0101111 1000001 4 0101100 0000000 5 0101011 0000000 6 0101010 0000000 ...
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OCTAL CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT Table-10 Transmit Waveform Value For DS1 0 dB LBO Sample 0010111 1000010 2 0100111 1000001 3 0100111 0000000 4 0100110 0000000 5 0100101 0000000 6 0100101 ...
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OCTAL CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT 3.2.4 TRANSMIT PATH LINE INTERFACE The transmit line interface consists of TTIPn pin and TRINGn pin. The impedance matching can be realized by the internal impedance matching circuit or the external ...
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OCTAL CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT 3.3 RECEIVE PATH The receive path consists of Receive Internal Termination, Monitor Gain, Amplitude/Wave Shape Detector, Digital Tuning Controller, Adaptive Equalizer, Data Slicer, CDR (Clock and Data Recovery), Optional Jitter Attenuator, ...
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OCTAL CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT 3.3.2 LINE MONITOR In both T1/J1 and E1 short haul applications, the non-intrusive monitor- ing on channels located in other chips can be performed by tapping the mon- itored channel through ...
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OCTAL CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT 3.3.10 G.772 NON-INTRUSIVE MONITORING In applications using only seven channels, channel 1 can be configured to monitor the data received or transmitted in any one of the remaining chan- nels. The ...
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OCTAL CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT 3.4 JITTER ATTENUATOR There is one Jitter Attenuator in each channel of the LIU. The Jitter Atten- uator can be deployed in the transmit path or the receive path, and can ...
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OCTAL CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT 3.5 LOS AND AIS DETECTION 3.5.1 LOS DETECTION The Loss of Signal Detector monitors the amplitude of the incoming sig- nal level and pulse density of the received signal on RTIPn ...
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OCTAL CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT Table-18 LOS Declare and Clear Criteria for Long Haul Mode Control bit T1E1 LAC LOS[4:0] 00000 00001 … 0 T1.231 10001 … 10101 10110-11111 00000 - … 00110 1=T1/J1 I.431 00111 ...
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OCTAL CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT 3.6 TRANSMIT AND DETECT INTERNAL PATTERNS The internal patterns (All Ones, All Zeros, PRBS/QRSS pattern and Activate/Deactivate Loopback Code) will be generated and detected by the IDT82V2088. TCLKn is used as ...
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OCTAL CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT LOS/AIS LOSn Detector B8ZS/ RCLKn RDn/RDPn HDB3/AMI CVn/RDNn Decoder B8ZS/ TCLKn TDn/TDPn HDB3/AMI Encoder TDNn LOS/AIS LOSn Detector B8ZS/ RCLKn Jitter RDn/RDPn HDB3/AMI Attenuator CVn/RDNn Decoder B8ZS/ TCLKn Jitter TDn/TDPn HDB3/AMI ...
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OCTAL CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT 3.7.4 INBAND LOOPBACK When PATT[1:0] bits (MAINT0, 0AH...) are set to ‘11’, the correspond- ing channel is configured in Inband Loopback mode. In this mode, an unframed activate/Deactivate Loopback Code is ...
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OCTAL CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT 3.8 ERROR DETECTION/COUNTING AND INSERTION 3.8.1 DEFINITION OF LINE CODING ERROR The following line encoding errors can be detected and counted by the IDT82V2088: • Received Bipolar Violation (BPV) Error: In ...
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OCTAL CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT • Manual Report Mode In Manual Report Mode, the internal Error Counter starts to count the received errors when the CNT_MD bit (MAINT6, 10H...) is set to ‘0’. When there is ...
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OCTAL CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT 3.10 MCLK AND TCLK 3.10.1 MASTER CLOCK (MCLK) MCLK is an independent, free-running reference clock. MCLK is 1.544 MHz or 37.056 MHz for T1/J1 applications and 2.048 MHz or 49.152 MHz ...
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OCTAL CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT 3.11 MICROCONTROLLER INTERFACES The microcontroller interface provides access to read and write the reg- isters in the device. The chip supports serial processor interface and two kinds of parallel processor interface: ...
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OCTAL CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT 3.12 INTERRUPT HANDLING All kinds of interrupt of the IDT82V2088 are indicated by the INT pin. When the INT_PIN[0] bit (GCF0, 40H) is ‘0’, the INT pin is open drain active ...
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OCTAL CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT 3.13 GENERAL PURPOSE I/O The IDT82V2088 provides two general purpose digital I/O pins: GPIO1, GPIO0. These two pins can be considered as digital Input or Output port by the DIR1 bit ...
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OCTAL CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT 4 PROGRAMMING INFORMATION 4.1 REGISTER LIST AND MAP The IDT82V2088 registers can be divided into Global Registers and Local Registers. The operation on the Global Registers affects all the eight channels ...
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OCTAL CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT Table-24 Per Channel Register List and Map Address (Hex) Register R/W CH1-CH8 Jitter Attenuation Control Register 01,21,41,61,81,A1,C1,E1 JACF R/W Transmit Path Control Registers 02,22,42,62,82,A2,C2,E2 TCF0 R/W 03,23,43,63,83,A3,C3,E3 TCF1 R/W 04,24,44,64,84,A4,C4,E4 TCF2 ...
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OCTAL CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT 4.2 REGISTER DESCRIPTION 4.2.1 GLOBAL REGISTERS Table-25 ID: Chip Revision Register (R, Address = 00H) Symbol Bit Default ID[7:0] 7-0 01H Table-26 RST: Reset Register (W, Address = 20H) Symbol Bit ...
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OCTAL CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT Table-28 GCF1: Global Configuration Register 1 (R/W, Address = 60H) Symbol Bit Default MON[3:0] 7-4 0000 - 3-0 0000 Table-29 INTCH: Interrupt Channel Indication Register (R, Address = 80H) Symbol Bit ...
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OCTAL CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT 4.2.2 JITTER ATTENUATION CONTROL REGISTER Table-31 JACF: Jitter Attenuator Configuration Register (R/W, Address = 01H,21H,41H,61H,81H,A1H,C1H,E1H) Symbol Bit Default - 7-6 00 JA_LIMIT 5 0 JACF[1:0] 4-3 00 JADP[1:0] 2-1 00 JABW ...
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OCTAL CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT Table-33 TCF1: Transmitter Configuration Register 1 (R/W, Address = 03H,23H,43H,63H,83H,A3H,C3H,E3H) Symbol Bit Default - 7-6 00 DFM_OFF 5 0 THZ 4 1 PULS[3:0] 3-0 0000 1. In internal impedance matching mode, ...
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OCTAL CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT Table-35 TCF3: Transmitter Configuration Register 3 (R/W, Address = 05H,25H,45H,65H,85H,A5H,C5H,E5H) Symbol Bit Default DONE UI[1:0] 5-4 00 SAMP[3:0] 3-0 0000 Table-36 TCF4: Transmitter Configuration Register 4 ...
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OCTAL CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT Table-38 RCF1: Receiver Configuration Register 1 (R/W, Address = 08H,28H,48H,68H,88H,A8H,C8H,E8H) Symbol Bit Default - 7 0 EQ_ON LOS[4:0] 4-0 10101 Reserved = 0: receive equalizer off ...
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OCTAL CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT Table-39 RCF2: Receiver Configuration Register 2 (R/W, Address = 09H,29H,49H,69H,89H,A9H,C9H,E9H) Symbol Bit Default - 7-6 00 SLICE[1:0] 5-4 01 UPDW[1:0] 3-2 10 MG[1:0] 1-0 00 4.2.5 NETWORK DIAGNOSTICS CONTROL REGISTERS Table-40 ...
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OCTAL CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT Table-41 MAINT1: Maintenance Function Control Register 1 (R/W, Address = 0BH,2BH,4BH,6BH,8BH,ABH,CBH,EBH) Symbol Bit Default - 7-4 0000 ARLP 3 0 RLP 2 0 ALP 1 0 DLP 0 0 Table-42 MAINT2: ...
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OCTAL CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT Table-44 MAINT4: Maintenance Function Control Register 4 (R/W, Address = 0EH,2EH,4EH,6EH,8EH,AEH,CEH,EEH) Symbol Bit Default RIBLBA[7:0] 7-0 (000)00001 Defines the user-programmable receive Inband Loopback activate code. The default selection is 00001. Table-45 ...
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OCTAL CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT 4.2.6 INTERRUPT CONTROL REGISTERS Table-47 INTM0: Interrupt Mask Register 0 (R/W, Address = 11H,31H,51H,71H,91H,B1H,D1H,F1H) Symbol Bit Default EQ_IM 7 1 IBLBA_IM 6 1 IBLBD_IM 5 1 PRBS_IM 4 1 TCLK_IM 3 ...
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OCTAL CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT Table-48 INTM1: Interrupt Mask Register 1 (R/W, Address = 12H,32H,52H,72H,92H,B2H,D2H,F2H) Symbol Bit Default DAC_OV_IM 7 1 JAOV_IM 6 1 JAUD_IM 5 1 ERR_IM 4 1 EXZ_IM 3 1 CV_IM 2 1 ...
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OCTAL CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT Table-49 INTES: Interrupt Trigger Edges Select Register (R/W, Address = 13H,33H, 53H,73H,93H,B3H,D3H,F3H) Symbol Bit Default EQ_IES 7 0 IBLBA_IES 6 0 IBLBD_IES 5 0 PRBS_IES 4 0 TCLK_IES 3 0 DF_IES ...
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OCTAL CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT 4.2.7 LINE STATUS REGISTERS Table-50 STAT0: Line Status Register 0 (real time status monitor) (R, Address = 14H,34H,54H,74H,94H,B4H,D4H,F4H) Symbol Bit Default EQ_S 7 0 IBLBA_S 6 0 IBLBD_S 5 0 PRBS_S ...
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OCTAL CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT Table-50 STAT0: Line Status Register 0 (real time status monitor) (Continued) (R, Address = 14H,34H,54H,74H,94H,B4H,D4H,F4H) Symbol Bit Default DF_S 2 0 AIS_S 1 0 LOS_S 0 0 Line driver status indication ...
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OCTAL CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT Table-51 STAT1: Line Status Register 1 (real time status monitor) (R, Address = 15H,35H, 55H,75H,95H,B5H, D5H, F5H) Symbol Bit Default - 7-6 00 RLP_S 5 0 LATT[4:0] 4-0 00000 Reserved Indicating ...
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OCTAL CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT 4.2.8 INTERRUPT STATUS REGISTERS Table-52 INTS0: Interrupt Status Register 0 (this register is reset after a read operation) (R, Address = 16H,36H, 56H,76H,96H,B6H, D6H, F6H) Symbol Bit Default EQ_IS 7 0 ...
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OCTAL CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT Table-53 INTS1: Interrupt Status Register 1 (this register is reset and relevant interrupt request is cleared after a read) (R, Address = 17H,37H, 57H,77H,97H,B7H, D7H, F7H) Symbol Bit Default DAC_OV_IS 7 ...
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OCTAL CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT 4.2.10 TRANSMIT AND RECEIVE TERMINATION REGISTER Table-56 TERM: Transmit and Receive Termination Configuration Register (R/W, Address = 1AH,3AH, 5AH,7AH,9AH,BAH,DAH,FAH) Symbol Bit Default - 7-6 00 T_TERM[2:0] 5-3 000 R_TERM[2:0] 2-0 000 ...
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OCTAL CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT 5 IEEE STD 1149.1 JTAG TEST ACCESS PORT The IDT82V2088 supports the digital Boundary Scan Specification as described in the IEEE 1149.1 standards. The boundary scan architecture consists of data and ...
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OCTAL CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT 5.1 JTAG INSTRUCTIONS AND INSTRUCTION REG- ISTER The IR (Instruction Register) with instruction decode block is used to select the test to be executed or the data register to be accessed ...
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OCTAL CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT 5.2.4 TEST ACCESS PORT CONTROLLER The TAP controller is a 16-state synchronous state machine. shows its state diagram following the description of each state. Note that the figure contains two main ...
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OCTAL CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT Table-59 TAP Controller State Description (Continued) STATE Pause-IR The pause state allows the test controller to temporarily halt the shifting of data through the instruction register. The test data register selected ...
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OCTAL CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT 6 TEST SPECIFICATIONS Table-60 Absolute Maximum Rating Symbol VDDA, VDDD Core Power Supply VDDIO I/O Power Supply VDDT1-8 Transmit Power Supply VDDR1-8 Receive Power Supply Input Voltage, Any Digital Pin Input ...
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OCTAL CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT Table-62 Power Consumption Symbol Parameter E1, 3 Ω Load E1, 3.3 V, 120 Ω Load 3 T1, 3.3 V, 100 Ω Load J1, 3.3 V, 110 Ω Load 1.Maximum ...
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OCTAL CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT Table-64 E1 Receiver Electrical Characteristics Symbol Parameter Receiver sensitivity Short haul with cable loss@1024kHz: Long haul with cable loss@1024kHz: Analog LOS level Short haul Long haul Allowable consecutive zeros before LOS ...
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OCTAL CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT Table-65 T1/J1 Receiver Electrical Characteristics Symbol Parameter receiver sensitivity Short haul with cable loss@772kHz: Long haul with cable loss@772kHz: Analog LOS level Short haul Long haul Allowable consecutive zeros before LOS ...
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OCTAL CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT Table-66 E1 Transmitter Electrical Characteristics Symbol Vo-p Output pulse amplitudes E1, 75Ω load E1, 120Ω load Vo-s Zero (space) level E1, 75 Ω load E1, 120 Ω load Transmit amplitude variation ...
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OCTAL CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT Table-67 T1/J1 Transmitter Electrical Characteristics Symbol Vo-p Output pulse amplitudes Vo-s Zero (space) level Transmit amplitude variation with supply Difference between pulse sequences for 17 consecutive pulses(T1.102) TPW Output Pulse Width ...
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OCTAL CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT Table-68 Transmitter and Receiver Timing Characteristics Symbol Parameter MCLK frequency E1: T1/J1: MCLK tolerance MCLK duty cycle Transmit path TCLK frequency E1: T1/J1: TCLK tolerance TCLK Duty Cycle t1 Transmit Data ...
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OCTAL CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT TCLKn TDn/TDPn TDNn RCLKn RDPn/RDn (RCLK_SEL = 0) RDNn/CVn RDPn/RDn (RCLK_SEL = 1) RDNn/CVn Table-69 Jitter Tolerance Jitter Tolerance E1 – 2.4 KHz 18 KHz – 100 ...
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OCTAL CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT Figure-26 E1 Jitter Tolerance Performance Figure-27 T1/J1 Jitter Tolerance Performance 69 INDUSTRIAL TEMPERATURE RANGES ...
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OCTAL CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT Table-70 Jitter Attenuator Characteristics Parameter Jitter Transfer Function Corner (-3dB) Frequency Jitter Attenuator E1: (G.736 400 Hz @ 100 kHz T1/J1: (Per AT&T pub.62411) ...
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OCTAL CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT Figure-28 E1 Jitter Transfer Performance Figure-29 T1/J1 Jitter Transfer Performance 71 INDUSTRIAL TEMPERATURE RANGES ...
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OCTAL CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT Table-71 JTAG Timing Characteristics Symbol t1 TCK Period t2 TMS to TCK Setup Time TDI to TCK Setup Time t3 TCK to TMS Hold Time TCK to TDI Hold Time t4 ...
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OCTAL CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT 7 MICROCONTROLLER INTERFACE TIMING CHARACTERISTICS 7.1 SERIAL INTERFACE TIMING Table-72 Serial Interface Timing Characteristics Symbol t1 SCLK High Time t2 SCLK Low Time t3 Active CS to SCLK Setup Time t4 ...
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OCTAL CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT 7.2 PARALLEL INTERFACE TIMING Table-73 Non_multiplexed Motorola Read Timing Characteristics Symbol tRC Read Cycle Time tDW Valid DS Width tRWV Delay from DS to Valid Read Signal tRWH R ...
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OCTAL CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT Table-74 Non_multiplexed Motorola Write Timing Characteristics Symbol tWC Write Cycle Time tDW Valid DS Width tRWV Delay from DS to Valid Write Signal tRWH R Hold Time tAV Delay ...
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OCTAL CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT Table-75 Non_multiplexed Intel Read Timing Characteristics Symbol tRC Read Cycle Time tRDW Valid RD Width tAV Delay from RD to Valid Address tAH Address to RD Hold Time tPRD RD to ...
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OCTAL CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT Table-76 Non_multiplexed Intel Write Timing Characteristics Symbol tWC Write Cycle Time tWRW Valid WR Width tAV Delay from WR to Valid Address tAH Address to WR Hold Time tDV Delay from ...
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OCTAL CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT ORDERING INFORMATION XXXXXXX Device Type DATASHEET DOCUMENT HISTORY 06/26/2003 pgs. 18, 19, 30, 31, 35, 43, 61, 62. 08/22/2003 pgs. 19, 20. 07/19/2004 pgs. 32, 65, 66. CORPORATE HEADQUARTERS 2975 Stender ...