DJLXT384LE.B1SE001 Intel, DJLXT384LE.B1SE001 Datasheet - Page 32

DJLXT384LE.B1SE001

Manufacturer Part Number
DJLXT384LE.B1SE001
Description
Manufacturer
Intel
Datasheet

Specifications of DJLXT384LE.B1SE001

Screening Level
Industrial
Mounting
Surface Mount
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Lead Free Status / RoHS Status
Not Compliant
Intel
32
Table 9.
®
LXT384 Octal T1/E1/J1 S/H PCM Transceiver with JA
Framer/Mapper Transmit Signals (Sheet 2 of 3)
TNEG7
TNEG6
TNEG5
TNEG4
TNEG3
TNEG2
TNEG1
TNEG0
TNEG7 /
TNEG6 /
TNEG5 /
TNEG4 /
TNEG3 /
TNEG2 /
TNEG1 /
TNEG0 /
TDATA7
TDATA6
TDATA5
TDATA4
TDATA3
TDATA2
TDATA1
TDATA0
Signal
Name
/ UBS7
/ UBS6
/ UBS5
/ UBS4
/ UBS3
/ UBS2
/ UBS1
/ UBS0
/ TPOS7
/ TPOS6
/ TPOS5
/ TPOS4
/ TPOS3
/ TPOS2
/ TPOS1
/ TPOS0
UBS7
UBS6
UBS5
UBS4
UBS3
UBS2
UBS1
UBS0
QFP
144
102
109
144
102
109
101
108
Pin
72
79
31
38
72
79
31
38
73
80
30
37
7
7
1
8
PBGA
Ball
D12
N12
D12
N12
D13
N13
B12
L12
B12
L12
B13
L13
B3
D3
N3
B3
D3
N3
B2
D2
N2
L3
L3
L2
Signal
Type
DI
DI
DI
Transmit Negative Data Input 7:0.
TNEG and TPOS have the following characteristics:
TNEG/TPOS pin settings result in the selections shown in
the following table.
For other pin functions, see UBS.
Unipolar/Bipolar Select Input 7:0.
The mode-controlled UBS pins define the interface between
the framer/mapper and the transceiver.
When the UBS is connected:
In unipolar I/O mode, TDATA is the data input.
For other pin functions, see TNEG.
Transmit Data Input 7:0.
When unipolar I/O is selected for the LXT384 Transceiver,
TDATA is the only data input pin. After passing through the
transceiver, TDATA generates the TTIP/TRING outputs.
For other pin functions, see TPOS.
• Operate in bipolar I/O mode.
• Active-high NRZ inputs.
• Remain active during an LOS condition.
• TPOS indicates the transmission of a positive pulse.
• TNEG indicates the transmission of a negative pulse.
• Low selects bipolar I/O.
• High selects unipolar I/O after 16 consecutive TCLK
• TPOS=Transmit Positive data input
• TDATA=Transmit Data input
TPOS
clock cycles. With unipolar I/O, the encoding/decoding
type can be either B8ZS/HDB3 or AMI. When the mode
is the:
• Host Processor mode, the encoding/decoding type is
• Hardware mode, the encoding/decoding type is
0
0
1
1
determined by the CODEN bit in the GCR register.
(For CODEN bit details, see
“Registers”.)
determined by the CODEN pin discussed in
5.6, “Configuration and Mode-Select
TNEG
0
1
0
1
Signal Description
Space
Negative Mark
Positive Mark
Space (Not legal)
Selection
Revision Date: November 28, 2005
Chapter 8.0,
Document Number: 248994
Revision Number: 005
Signals”.
Section

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