DJLXT384LE.B1SE001 Intel, DJLXT384LE.B1SE001 Datasheet - Page 45

DJLXT384LE.B1SE001

Manufacturer Part Number
DJLXT384LE.B1SE001
Description
Manufacturer
Intel
Datasheet

Specifications of DJLXT384LE.B1SE001

Screening Level
Industrial
Mounting
Surface Mount
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Lead Free Status / RoHS Status
Not Compliant
5.10
Document Number: 248994
Revision Number: 005
Revision Date: November 28, 2005
Table 18. Intel
Table 19. Intel
Intel
In Host Mode, the contents of the Pulse Shaping Data Register (PSDAT) determines the shape of
pulse output at TTIP/TRING. Refer to
LEN0
LEN1
LEN2
LEN2
1. Line length from LXT384 Transceiver to DSX-1 cross-connect point.
2. Maximum cable loss at 772KHz.
Signal
Name
0
1
1
1
1
0
®
®
LXT384 Transceiver Line Length Equalizer Inputs
®
LXT384 Transceiver Line Length Equalizers
LEN1
LXT384 Transceiver Line Length Equalizers
1
0
0
1
1
0
QFP
Pin
84
85
86
LEN0
1
0
1
0
1
0
PBGA
Ball
J14
J13
J12
0 - 133 ft. ABAM
133 - 266 ft. ABAM
266 - 399 ft. ABAM
399 - 533 ft. ABAM
533 - 655 ft. ABAM
E1 G.703, 75Ω coaxial cable and 120 Ω twisted pair
cable.
Line Length
Signal
Type
DI
Intel
Table 44
Line Length Equalizer Input 2:0.
In Hardware Mode for the LXT384 Transceiver, these pins
determine the shape and amplitude of the transmit pulse.
1
®
LXT384 Octal T1/E1/J1 S/H PCM Transceiver with JA
and
Table
Cable Loss
0.6 dB
1.2 dB
1.8 dB
2.4 dB
3.0 dB
45.
Signal Description
2
Operation Mode
E1
T1
45

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