82P2281PFG IDT, Integrated Device Technology Inc, 82P2281PFG Datasheet - Page 196
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82P2281PFG
Manufacturer Part Number
82P2281PFG
Description
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet
1.82P2281PFG.pdf
(371 pages)
Specifications of 82P2281PFG
Number Of Transceivers
1
Screening Level
Industrial
Mounting
Surface Mount
Package Type
TQFP
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Lead Free Status / RoHS Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
82P2281PFG
Manufacturer:
IDT
Quantity:
112
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T1/J1 THDLC1 Control (0A7H)
T1/J1 THDLC2 Control (0A8H)
T1/J1 THDLC3 Control (0A9H)
EOM:
ABORT:
THDLCM:
TRST:
Programming Information
IDT82P2281
Bit Name
Bit Name
Bit Name
Default
Default
Default
Bit No.
Bit No.
Bit No.
Type
Type
Type
The function of the above three sets of registers are the same. However, they correspond to different THDLC.
A transition from ‘0’ to ‘1’ on this bit indicates an entire HDLC packet is stored in the FIFO and starts the packet transmission.
= 0: Disable the manual abort sequence insertion.
= 1: The abort sequence (‘01111111’) is manually inserted to the current HDLC packet.
This bit is self-cleared after the abortion.
= 0: HDLC mode is selected.
= 1: Reserved.
A transition from ‘0’ to ‘1’ on the this bit resets the corresponding HDLC Transmitter. The reset will clear the FIFO.
7
7
7
Reserved
Reserved
Reserved
6
6
6
5
5
5
EOM
EOM
EOM
R/W
R/W
R/W
4
0
4
0
4
0
196
SINGLE T1/E1/J1 LONG HAUL / SHORT HAUL TRANSCEIVER
Reserved
Reserved
Reserved
3
3
3
ABORT
ABORT
ABORT
R/W
R/W
R/W
2
0
2
0
2
0
THDLCM
THDLCM
THDLCM
R/W
R/W
R/W
1
0
1
0
1
0
August 20, 2009
TRST
TRST
TRST
R/W
R/W
R/W
0
0
0
0
0
0
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