IDTICS1893CFLFT IDT, Integrated Device Technology Inc, IDTICS1893CFLFT Datasheet - Page 6

no-image

IDTICS1893CFLFT

Manufacturer Part Number
IDTICS1893CFLFT
Description
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet

Specifications of IDTICS1893CFLFT

Lead Free Status / RoHS Status
Compliant
ICS1893CF, Rev. J, 08/11/09
Table 2-1. Conventions and Nomenclature (Continued)
Signal references
Symbols
Terms:
‘set’,
‘active’,
‘asserted’,
Terms:
‘cleared’,
‘de-asserted’,
‘inactive’
Terms:
‘twisted-pair receiver’
Terms:
‘twisted-pair transmitter’
ICS1893CF Data Sheet - Release
Item
The terms ‘set’, ‘active’, and ‘asserted’ are synonymous.
They do not necessarily infer logic one.
(For example, an active-low signal can be set to logic zero.)
The terms ‘cleared’, ‘inactive’, and ‘de-asserted’ are synonymous.
They do not necessarily infer logic zero.
In reference to the ICS1893CF, the term ‘Twisted-Pair Receiver’ refers to the
set of Twisted-Pair Receive output pins (TP_RXP and TP_RXN).
In reference to the ICS1893CF, the term ‘Twisted-Pair Transmitter’ refers to
the set of Twisted-Pair Transmit output pins (TP_TXP and TP_TXN).
Copyright © 2009, Integrated Device Technology, Inc.
When referring to signals, the terms:
– ‘FALSE’, ‘low’, or ‘zero’ represent signals that are logic zero.
– ‘TRUE’, ‘high’, or ‘one’ represent signals that are logic one.
Chapter 9, “DC and AC Operating Conditions”
specifications for ‘logic zero’ and ‘logic one’ signals.
In this data sheet, code group names are referred to as ‘symbols’ and they
are shown between '/' (slashes). For example, the symbol /J/ represents
the first half of the Start-of-Stream Delimiter (SSD1).
Symbol sequences are shown in succession. For example, /I/J/K/
represents an IDLE followed by the SSD.
All rights reserved.
6
Convention / Nomenclature
Chapter 2 Conventions and Nomenclature
defines the electrical
August, 2009

Related parts for IDTICS1893CFLFT