CYV15G0201DXB-BBI Cypress Semiconductor Corp, CYV15G0201DXB-BBI Datasheet - Page 33

• Manufacturer Part Number: CYV15G0201DXB-BBI
• Manufacturer: Cypress Semiconductor Corp

Specifications of CYV15G0201DXB-BBI

• Lead Free Status / RoHS Status: Not Compliant

Document #: 38-02058 Rev. *H
CYP(V)(W)15G0201DXB HOTLink II Transmitter Switching Waveforms
Notes:
42. When REFCLK is configured for half-rate operation (TXRATE = HIGH) and data is captured using REFCLK instead of a TXCLKx clock (TXCKSEL = LOW), data
43. The TXCLKO output is at twice the rate of REFCLK when TXRATE = HIGH and same rate as REFCLK when TXRATE = LOW. TXCLKO does not follow the
44. The TXCLKO output remains at the character rate regardless of the state of TXRATE and does not follow the duty cycle of REFCLK.
TXCTx[1:0],
TXDx[7:0],
TXCTx[1:0],
Transmit Interface
Write Timing
TXCKSEL = LOW
TXRATE = LOW
TXCTx[1:0],
is captured using both the rising and falling edges of REFCLK.
duty cycle of REFCLK.
Transmit Interface
Write Timing
TXCKSEL = LOW
TXRATE = HIGH
Transmit Interface
TXCLKO Timing
TXCKSEL = LOW
TXRATE = HIGH
TXDx[7:0],
TXDx[7:0],
Transmit Interface
Write Timing
TXCKSEL ≠ LOW
TXOPx,
REFCLK
TXCLKO
(internal)
SCSEL
TXOPx,
TXCLKx
REFCLK
REFCLK
TXOPx,
SCSEL
SCSEL
Note 43
Note 42
t
TXCLKOD+
t
t
TREFDH
REFH
t
TXCLKH
t
TXCLKO
t
REFCLK
t
t
REFH
REFH
t
TXCLK
t
TREFDS
t
Note 43
TXCLKOD-
t
REFL
t
TXCLKL
t
TXDS
t
TREFDS
t
t
REFCLK
REFCLK
Note 42
t
TREFDH
t
TXDH
t
TREFDH
t
t
REFL
REFL
CYW15G0201DXB
CYP15G0201DXB
CYV15G0201DXB
t
TREFDS
Page 33 of 46
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