HY82563EB S L7WG Intel, HY82563EB S L7WG Datasheet - Page 33

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HY82563EB S L7WG

Manufacturer Part Number
HY82563EB S L7WG
Description
Manufacturer
Intel
Datasheet

Specifications of HY82563EB S L7WG

Lead Free Status / RoHS Status
Compliant
4.6
4.6.1
Table 26. Link (MDI) Interface Electrical Specification
Table 27. Kumeran (Serial) Transmit Specifications
Kumeran (Serial) Interface
Transmit
The Kumeran interface is electrically compatible with the SERDES implemented in 1000Base-BX
applications, as defined in the PICMG 3.1 Specification, Version 1.0, Chapter 5, Backplane
Physical Layers Interfaces. It also implements electrical idle as described in section 3.5.4. As part
of the electrical idle implementation, the Kumeran interface also needs to be able to detect when
the 631xESB/632xESB is in electrical idle.
The transmit specifications are measured with the following test load.
Symbol
Symbol
V
a.
b.
c.
d.
e.
V
V
DIFFp-p
DIFFp
IDIFF
IEEE 802.3ab Figure 40-19 points A&B.
IEEE 802.3 Clause 14, Figure 14.9 shows the template for the “far end” wave form. This template allows as little as 495mV peak differential
voltage at the far end receiver.
See IEEE 802.3, Clause 14, Figure 14.17 for the template for the receive wave form.
The ANSI TP-PMD specification requires that any received signal with peak-to-peak differential amplitude greater than 1000 mV should turn on
signal detect. The 82563EB/82564EB will accept signals typically with 460 mV peak-to-peak differential amplitude.
The ANSI TP-PMD specification requires that any received signal with peak-to-peak differential amplitude less than 200 mV should de-assert
signal detect. The 82563EB/82564EB will reject signals typically with 360 mV peak-to-peak differential amplitude
Signaling Speed (raw data
Signal Detect Assertion
Impedance at Connection
Amplitude (peak to peak)
Data Rate (original data)
Peak differential input
rate of encoded data)
Signal Detect De-
Differential Output
Differential Output
Amplitude (peak)
Clock Tolerance
Parameter
82563EB/82564EB Gigabit Platform LAN Connect Networking Silicon
Return Loss
assertion
Parameter
voltage
MDI[1:0]
MDI[1:0]
MDI[1:0]
Pins
1249.875
999.9
-100
Min
750
375
10
70
100Base-TX
1000
1250
Typ
100
Condition
10Base-T
-
-
-
-
-
1250.125
1000.1
+100
1350
Max
675
130
-
585
Min
200
Mb/s
Unit
ppm
mV
mV
dB
c
V
460
360
Typ
1000 mb/s ± 100 ppm
1250 mb/s ± 100 ppm
Equivalent to V
-
d
e
Notes
1000
Max
-
DIFFp-p
peak
peak
peak
peak
Unit
mV
mV
mV
-
-
27

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