ICS1892Y-10T IDT, Integrated Device Technology Inc, ICS1892Y-10T Datasheet - Page 67
ICS1892Y-10T
Manufacturer Part Number
ICS1892Y-10T
Description
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet
1.ICS1892Y-10T.pdf
(148 pages)
Specifications of ICS1892Y-10T
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8.3.2 100Base-TX Full Duplex (bit 1.14)
8.3.3 100Base-TX Half Duplex (bit 1.13)
8.3.4 10Base-T Full Duplex (bit 1.12)
8.3.5 10Base-T Half Duplex (bit 1.11)
ICS1892, Rev. D, 2/26/01
The STA reads this bit to learn if the ICS1892 can support 100Base-TX, Full Duplex operations. The
ISO/IEC specification requires that the ICS1892 must set bit 1.14 to logic:
•
•
This bit 1.14 is a Command Override Write bit, which allows an STA to alter the default value of this bit.
[See the description of bit 16.15, the Command Override Write Enable bit, in
Extended Control
The STA reads this bit to learn if the ICS1892 can support 100Base-TX, half-duplex operations. The
ISO/IEC specification requires that the ICS1892 must set bit 1.13 to logic:
•
•
This bit 1.13 is a Command Override Write bit, which allows an STA to alter the default value of this bit.
[See the description of bit 16.15, the Command Override Write Enable bit, in
Extended Control
The STA reads this bit to learn if the ICS1892 can support 10Base-T, full-duplex operations. The ISO/IEC
specification requires that the ICS1892 must set bit 1.12 to logic:
•
•
This bit 1.12 is a Command Override Write bit, which allows an STA to alter the default value of this bit.
[See the description of bit 16.15, the Command Override Write Enable bit, in
Extended Control
The STA reads this bit to learn if the ICS1892 can support 10Base-T, half-duplex operations. The ISO/IEC
specification requires that the ICS1892 must set bit 1.11 to logic:
•
•
Bit 1.11 of the ICS1892 Status Register is a Command Override Write bit., which allows an STA to alter the
default value of this bit. [See the description of bit 16.15, the Command Override Write Enable bit, in
Section 8.11, “Register 16: Extended Control
Zero if it cannot support 100Base-TX, full-duplex operations.
One if it can support 100Base-TX, full-duplex operations. (For the ICS1892, the default value of bit 1.14
is logic one. Therefore, when an STA reads the Status Register, the STA is informed that the ICS1892
supports 100Base-TX, full-duplex operations.)
Zero if it cannot support 100Base-TX, half-duplex operations.
One if it can support 100Base-TX, half-duplex operations. (For the ICS1892, the default value of bit 1.13
is logic one. Therefore, when an STA reads the Status Register, the STA is informed that the ICS1892
supports 100Base-TX, half-duplex operations.)
Zero if it cannot support 10Base-T, full-duplex operations.
One if it can support 10Base-T, full-duplex operations. (For the ICS1892, the default value of bit 1.12 is
logic one. Therefore, when an STA reads the Status Register, the STA is informed that the ICS1892
supports 10Base-T, full-duplex operations.)
Zero if it cannot support 10Base-T, half-duplex operations.
One if it can support 10Base-T, half-duplex operations. (For the ICS1892, the default value of bit 1.11 is
logic one. Therefore, when an STA reads the Status Register, the STA is informed that the ICS1892
supports 10Base-T, half-duplex operations.)
ICS1892
Register”.]
Register”.]
Register”.]
© 2000-2001, Integrated Circuit Systems, Inc.
All rights reserved.
Register”.]
67
Chapter 8 Management Register Set
Section 8.11, “Register 16:
Section 8.11, “Register 16:
Section 8.11, “Register 16:
February 26, 2001
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