AM79C203JC AMD (ADVANCED MICRO DEVICES), AM79C203JC Datasheet - Page 24
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AM79C203JC
Manufacturer Part Number
AM79C203JC
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet
1.AM79C203JC.pdf
(40 pages)
Specifications of AM79C203JC
Lead Free Status / RoHS Status
Not Compliant
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Part Number:
AM79C203JC
Manufacturer:
AMD
Quantity:
20 000
Ambient temperature = 70°C
Programmed DC Feed conditions:
RG = GX = GR = AX = AR = 0 dB
R, X, B, and Z filters set to default
AISN = 0
TSH < ILD
TSH = Programmed switchhook detect threshold current
ILD = Programmed disable limit current
DC Feed conditions are normally set by the ASLAC device. When the ASLIC device is tested by itself, its operating conditions
must be simulated as if it were connected to an ideal ASLAC device. When the ASLAC device is tested by itself, its operating
conditions must simulate as if it were connected to an ideal ASLIC device.
2. These tests are performed with the following load impedances:
3. This parameter is tested at 1 kHz in production. Performance at other frequencies is guaranteed by characterization.
4. Not tested or partially tested in production. This parameter is guaranteed by characterization or correlation to other tests.
5. When the ASLIC/ASLAC devices are in the anti-sat operating region, this parameter will be degraded. The exact degradation
6. Guaranteed by design.
7. Overall 1.014 kHz insertion loss error of the ASLIC/ASLAC devices kit is guaranteed to be 0.34 dB.
8. These VBAT/QBAT, PSRR specifications are valid only when the ASLIC device is used with the ASLAC device that generates
9. Must meet at least one of these specifications.
10. These voltages are referred to VREF.
11. These limits refer to the two-wire output of an ideal ASLIC device but reflect only the capabilities of the ASLAC device.
12. When relative levels (dBm0) are used, the specification holds for any setting of (AX + GX) gain from 0 to 12 dB or
13. This parameter tested by inclusion in another test.
14. The group delay specification is defined as the sum of the minimum values of the group delays for the transmit and the receive
15. I/O
16. These limits reflect only the capabilities of the ASLAC device.
17. RSR1 = RSR2 = 750 k , RGFD1 = 510 .
18. DC Feed performance derates by 5% when operating from –40°C to 0°C and 70°C to 85°C.
19. Threshold values derate by 5% when operating from –40°C to 0°C and 70°C to 85°C.
20. Power cross and ring trip values derate by 5% when operating from –40°C to 0°C and 70°C to 85°C.
24
Frequency < 12 kHz - longitudinal impedance = 500 ; metallic impedance = 300
Active state, normal polarity for transmission performance
0 dBm = 1 mW @ 600
VAPP (apparent battery voltage) = 50.2 V
ILA (Active state loop-current limit) = 47.6 mA
ILD (Disable state loop-current limit) = 21.2 mA
RFD (DC Feed resistance) = 403
VAS (anti-sat activate voltage) = 10.3 V
N2 (anti-sat feed resistance factor) = 2
VOFF (longitudinal offset voltage) = 8.4 V
Frequency > 12 kHz - longitudinal impedance = 90 ; metallic impedance = 135
will depend on system design.
the anti-sat reference. Since the anti-sat reference depends upon the battery voltage sensed by the IBAT pin of the ASLAC
device, the PSRR of the kit will depend upon the amount of battery filtering provided by CB.
(AR + GR + RG) from 0 to –12 dB.
paths when the transmit and receive time slots are identical and the B, X, R, and Z filters are disabled with null coefficients.
For PCLK frequencies between 1.03 MHz and 1.53 MHz, the group delay may vary from one cycle to the next. See also Figure
2, Group Delay Distortion.
1
and I/O
2
have an additional circuit that pulls the pin High during 3-state.
(0.775 Vrms)
Am79213/Am79C203/031 Data Sheet
P R E L I M I N A R Y