PIC16F1937T-I/MV Microchip Technology, PIC16F1937T-I/MV Datasheet - Page 217
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PIC16F1937T-I/MV
Manufacturer Part Number
PIC16F1937T-I/MV
Description
14KB Flash, 512B RAM, 256B EEPROM, LCD, 1.8-5.5V 40 UQFN 5x5x0.5mm T/R
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Datasheet
1.PIC16F1937-EMV.pdf
(472 pages)
Specifications of PIC16F1937T-I/MV
Processor Series
PIC16F
Core
PIC
Program Memory Type
Flash
Program Memory Size
14 KB
Data Ram Size
256 B
Interface Type
MI2C, SPI, EUSART
Number Of Timers
5
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
UQFN-40
Development Tools By Supplier
MPLAB IDE Software
Minimum Operating Temperature
- 40 C
Core Processor
PIC
Core Size
8-Bit
Speed
32MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
36
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 14x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Lead Free Status / Rohs Status
Details
- Current page: 217 of 472
- Download datasheet (5Mb)
23.3.2
The following steps should be taken when configuring
the CCP module for standard PWM operation:
1.
2.
3.
4.
5.
6.
23.3.3
The PWM standard mode makes use of one of the 8-bit
Timer2/4/6 timer resources to specify the PWM period.
Configuring the CxTSEL<1:0> bits in the CCPTMRSx
register selects which Timer2/4/6 timer is used.
23.3.4
The PWM period is specified by the PRx register of
Timer2/4/6. The PWM period can be calculated using
the formula of
EQUATION 23-1:
2008-2011 Microchip Technology Inc.
Note:
Disable the CCPx pin output driver by setting the
associated TRIS bit.
Load the PRx register with the PWM period
value.
Configure the CCP module for the PWM mode
by loading the CCPxCON register with the
appropriate values.
Load the CCPRxL register and the DCxBx bits
of the CCPxCON register, with the PWM duty
cycle value.
Configure and start Timer2/4/6:
• Select the Timer2/4/6 resource to be used
• Clear the TMRxIF interrupt flag bit of the
• Configure the TxCKPS bits of the TxCON
• Enable the Timer by setting the TMRxON
Enable PWM output pin:
• Wait until the Timer overflows and the
• Enable the CCPx pin output driver by clear-
Note 1:
PWM Period
for PWM generation by setting the
CxTSEL<1:0> bits in the CCPTMRSx
register.
PIRx register. See Note below.
register with the Timer prescale value.
bit of the TxCON register.
TMRxIF bit of the PIRx register is set. See
Note below.
ing the associated TRIS bit.
SETUP FOR PWM OPERATION
In order to send a complete duty cycle and
period on the first PWM output, the above
steps must be included in the setup
sequence. If it is not critical to start with a
complete PWM signal on the first output,
then step 6 may be ignored.
TIMER2/4/6 TIMER RESOURCE
PWM PERIOD
Equation
T
OSC
=
(TMRx Prescale Value)
PWM PERIOD
= 1/F
PRx
23-1.
OSC
+
1
4 T
OSC
When TMRx is equal to PRx, the following three events
occur on the next increment cycle:
• TMRx is cleared
• The CCPx pin is set. (Exception: If the PWM duty
• The PWM duty cycle is latched from CCPRxL into
23.3.5
The PWM duty cycle is specified by writing a 10-bit
value to multiple registers: CCPRxL register and
DCxB<1:0> bits of the CCPxCON register. The
CCPRxL contains the eight MSbs and the DCxB<1:0>
bits of the CCPxCON register contain the two LSbs.
CCPRxL and DCxB<1:0> bits of the CCPxCON
register can be written to at any time. The duty cycle
value is not latched into CCPRxH until after the period
completes (i.e., a match between PRx and TMRx
registers occurs). While using the PWM, the CCPRxH
register is read-only.
Equation 23-2
width.
Equation 23-3
ratio.
EQUATION 23-2:
EQUATION 23-3:
The CCPRxH register and a 2-bit internal latch are
used to double buffer the PWM duty cycle. This double
buffering is essential for glitchless PWM operation.
The 8-bit timer TMRx register is concatenated with either
the 2-bit internal system clock (F
prescaler, to create the 10-bit time base. The system
clock is used if the Timer2/4/6 prescaler is set to 1:1.
When the 10-bit time base matches the CCPRxH and
2-bit latch, then the CCPx pin is cleared (see
Figure
cycle = 0%, the pin will not be set.)
CCPRxH.
Note:
Duty Cycle Ratio
Pulse Width
PIC16(L)F1934/6/7
23-4).
The Timer postscaler (see
“Timer2/4/6
determination of the PWM frequency.
PWM DUTY CYCLE
is used to calculate the PWM duty cycle
is used to calculate the PWM pulse
=
T
=
CCPRxL:CCPxCON<5:4>
OSC
PULSE WIDTH
DUTY CYCLE RATIO
---------------------------------------------------------------------- -
CCPRxL:CCPxCON<5:4>
Operation”) is not used in the
(TMRx Prescale Value)
4 PRx
OSC
DS41364E-page 217
), or 2 bits of the
+
1
Section 22.1
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