PIC16F721T-I/ML Microchip Technology, PIC16F721T-I/ML Datasheet - Page 116

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PIC16F721T-I/ML

Manufacturer Part Number
PIC16F721T-I/ML
Description
7 KB FLASH, 256 B SRAM, 18 I/O 20 QFN 4x4mm T/R
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Datasheet

Specifications of PIC16F721T-I/ML

Core Processor
PIC
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
17
Program Memory Size
7KB (4K x 14)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 12x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
PIC16F/LF720/721
15.3.4
The resolution determines the number of available duty
cycles for a given period. For example, a 10-bit resolution
will result in 1024 discrete duty cycles, whereas an 8-bit
resolution will result in 256 discrete duty cycles.
The maximum PWM resolution is 10 bits when PR2 is
255. The resolution is a function of the PR2 register
value as shown by
TABLE 15-4:
TABLE 15-5:
15.3.5
In Sleep mode, the TMR2 register will not increment
and the state of the module will not change. If the CCP1
pin is driving a value, it will continue to drive that value.
When the device wakes up, TMR2 will continue from its
previous state.
15.3.6
The PWM frequency is derived from the system clock
frequency (F
quency will result in changes to the PWM frequency.
Refer to
additional details.
15.3.7
Any Reset will force all ports to Input mode and the
CCP registers to their Reset states.
DS41430A-page 116
Timer Prescale (1, 4, 16)
PR2 Value
Maximum Resolution (bits)
Timer Prescale (1, 4, 16)
PR2 Value
Maximum Resolution (bits)
PWM Frequency
PWM Frequency
PWM RESOLUTION
OPERATION IN SLEEP MODE
CHANGES IN SYSTEM CLOCK
FREQUENCY
EFFECTS OF RESET
Section 7.0 “Oscillator Module”
OSC
). Any changes in the system clock fre-
EXAMPLE PWM FREQUENCIES AND RESOLUTIONS (F
EXAMPLE PWM FREQUENCIES AND RESOLUTIONS (F
Equation
15-4.
1.22 kHz
1.22 kHz
0xFF
0x65
16
10
16
8
4.88 kHz
4.90 kHz
0xFF
0x65
for
10
4
4
8
19.53 kHz
19.61 kHz
EQUATION 15-4:
15.3.8
The following steps should be taken when configuring
the CCP module for PWM operation:
1.
2.
3.
4.
5.
6.
0xFF
Note:
0x65
• Clear the TMR2IF interrupt flag bit of the PIR1
• Configure the T2CKPS bits of the T2CON
• Enable Timer2 by setting the TMR2ON bit of
• Wait until Timer2 overflows, TMR2IF bit of the
• Enable the PWM pin (CCP1) output driver(s)
Note:
10
1
1
8
Disable the PWM pin (CCP1) output driver(s) by
setting the associated TRIS bit(s).
Load the PR2 register with the PWM period value.
Configure the CCP module for the PWM mode
by loading the CCP1CON register with the
appropriate values.
Load the CCPR1L register and the DCxBx bits of
the CCP1CON register, with the PWM duty cycle
value.
Configure and start Timer2:
Enable PWM output pin:
register. See Note below.
register with the Timer2 prescale value.
the T2CON register.
PIR1 register is set. See Note below.
by clearing the associated TRIS bit(s).
Resolution
If the pulse width value is greater than the
period the assigned PWM pin(s) will
remain unchanged.
SETUP FOR PWM OPERATION
In order to send a complete duty cycle and
period on the first PWM output, the above
steps must be included in the setup
sequence. If it is not critical to start with a
complete PWM signal on the first output,
then step 6 may be ignored.
78.12 kHz
76.92 kHz
0x3F
0x19
1
8
1
6
OSC
OSC
=
PWM RESOLUTION
log
----------------------------------------- - bits
 2010 Microchip Technology Inc.
= 20 MHz)
= 8 MHz)
4 PR2
153.85 kHz
log
156.3 kHz
0x0C
0x1F
2  
1
7
1
5
+
1
208.3 kHz
200.0 kHz
0x17
0x09
6.6
1
1
5

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