PIC32MX360F512LT-80I/BG Microchip Technology, PIC32MX360F512LT-80I/BG Datasheet - Page 141

512 KB Flash, 32 KB RAM, 80 MHz, 10-Bit ADC, DMA Trace 121 XBGA 10x10x1.20mm T/R

PIC32MX360F512LT-80I/BG

Manufacturer Part Number
PIC32MX360F512LT-80I/BG
Description
512 KB Flash, 32 KB RAM, 80 MHz, 10-Bit ADC, DMA Trace 121 XBGA 10x10x1.20mm T/R
Manufacturer
Microchip Technology
Series
PIC® 32MXr

Specifications of PIC32MX360F512LT-80I/BG

Core Processor
MIPS32® M4K™
Core Size
32-Bit
Speed
80MHz
Connectivity
I²C, IrDA, LIN, PMP, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
121-TFBGA
Processor Series
PIC32MX3xx
Core
MIPS
3rd Party Development Tools
52713-733, 52714-737
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, DM320001, DM320002, MA320001
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC32MX360F512LT-80I/BG
Manufacturer:
Microchip Technology
Quantity:
10 000
REGISTER 26-6:
© 2010 Microchip Technology Inc.
Legend:
R = Readable bit
U = Unimplemented bit
bit 31-8
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1-0
DDPUSB
R/W-0
bit 31
bit 23
bit 15
bit 7
r-x
r-x
r-x
Reserved: Write ‘0’; ignore read
DDPUSB: Debug Data Port Enable for USB bit
1 = USB peripheral ignores USBFRZ (U1CNFG1<5>) setting
0 = USB peripheral follows USBFRZ setting
DDPU1: Debug Data Port Enable for UART1 bit
1 = UART1 peripheral ignores FRZ (U1MODE<14>) setting
0 = UART1 peripheral follows FRZ setting
DDPU2: Debug Data Port Enable for UART2 bit
1 = UART2 peripheral ignores FRZ (U2MODE<14>) setting
0 = UART2 peripheral follows FRZ setting
DDPSPI1: Debug Data Port Enable for SPI1 bit
1 = SPI1 peripheral ignores FRZ (SPI1CON<14>) setting
0 = SPI1 peripheral follows FRZ setting
JTAGEN: JTAG Port Enable bit
1 = Enable JTAG Port
0 = Disable JTAG Port
TROEN: Trace Output Enable bit
1 = Enable Trace Port
0 = Disable Trace Port
Reserved: Write ‘1’; ignore read
DDPU1
R/W-0
r-x
r-x
r-x
DDPCON: DEBUG DATA PORT CONTROL REGISTER
W = Writable bit
-n = Bit Value at POR: (‘0’, ‘1’, x = Unknown)
DDPU2
R/W-0
r-x
r-x
r-x
DDPSPI1
R/W-0
r-x
r-x
r-x
P = Programmable bit
JTAGEN
R/W-1
r-x
r-x
r-x
PIC32MX3XX/4XX
TROEN
R/W-0
r-x
r-x
r-x
r = Reserved bit
r-x
r-x
r-x
r-x
DS61143G-page 141
r-x
r-x
r-x
r-x
bit 24
bit 16
bit 8
bit 0

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