PIC32MX360F512LT-80I/BG Microchip Technology, PIC32MX360F512LT-80I/BG Datasheet - Page 147

• Manufacturer Part Number: PIC32MX360F512LT-80I/BG
• Description: 512 KB Flash, 32 KB RAM, 80 MHz, 10-Bit ADC, DMA Trace 121 XBGA 10x10x1.20mm T/R
• Manufacturer: Microchip Technology
• Series: PIC® 32MXr

Specifications of PIC32MX360F512LT-80I/BG

• Core Processor: MIPS32® M4K™
• Core Size: 32-Bit
• Speed: 80MHz
• Connectivity: I²C, IrDA, LIN, PMP, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 121-TFBGA
• Processor Series: PIC32MX3xx
• Core: MIPS
• 3rd Party Development Tools: 52713-733, 52714-737
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, DM320001, DM320002, MA320001
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

TABLE 27-1:
© 2010 Microchip Technology Inc.
TGE
TGEI
TGEIU
TGEU
TLT
TLTI
TLTIU
TLTU
TNE
TNEI
WAIT
WRPGPR
WSBH
XOR
XORI
Note 1:
Instruction
This instruction is deprecated and should not be used.
MIPS32
Trap if Greater Than or Equal
Trap if Greater Than or Equal Immediate
Trap if Greater Than or Equal Immediate Unsigned
Trap if Greater Than or Equal Unsigned
Trap if Less Than
Trap if Less Than Immediate
Trap if Less Than Immediate Unsigned
Trap if Less Than Unsigned
Trap if Not Equal
Trap if Not Equal Immediate
Wait for Interrupt
Write to GPR in Previous Shadow Set
Word Swap Bytes Within Halfwords
Exclusive OR
Exclusive OR Immediate
®
INSTRUCTION SET (CONTINUED)
Description
PIC32MX3XX/4XX
if (int)Rs >= (int)Rt
if (int)Rs >= (int)Immed
if (uns)Rs >= (uns)Immed
if (uns)Rs >= (uns)Rt
if (int)Rs < (int)Rt
if (int)Rs < (int)Immed
if (uns)Rs < (uns)Immed
if (uns)Rs < (uns)Rt
if Rs != Rt
if Rs != (int)Immed
Go to a low power mode and stall until
interrupt occurs
SGPR[SRSCtl
Rd = Rt
|| Rt
Rd = Rs ^ Rt
Rt = Rs ^ (uns)Immed
TrapException
TrapException
TrapException
TrapException
TrapException
TrapException
TrapException
TrapException
TrapException
TrapException
15..8
23..16
PSS
Function
|| Rt
, Rd> = Rt
31..24
DS61143G-page 147
|| Rt
7..0