STM32F100RET6B STMicroelectronics, STM32F100RET6B Datasheet - Page 86
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STM32F100RET6B
Manufacturer Part Number
STM32F100RET6B
Description
16/32-BITS MICROS
Manufacturer
STMicroelectronics
Series
STM32r
Datasheet
1.STM32F100RCT6TR.pdf
(97 pages)
Specifications of STM32F100RET6B
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
24MHz
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
DMA, PDR, POR, PVD, PWM, Temp Sensor, WDT
Number Of I /o
51
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x12b; D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-LQFP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
STM32F100RET6B
Manufacturer:
NXP
Quantity:
11 430
Company:
Part Number:
STM32F100RET6B
Manufacturer:
STMicroelectronics
Quantity:
10 000
Company:
Part Number:
STM32F100RET6BTR
Manufacturer:
STMicroelectronics
Quantity:
10 000
Electrical characteristics
Table 55.
1. Preliminary values.
Figure 37. 12-bit buffered /non-buffered DAC
1. The DAC integrates an output buffer that can be used to reduce the output impedance and to drive external loads directly
86/97
Offset
Gain
error
t
Update
rate
t
PSRR+
SETTLING
WAKEUP
Symbol
without the use of an external operational amplifier. The buffer can be bypassed by configuring the BOFFx bit in the
DAC_CR register.
(1)
(1)
(1)
(1)
(1)
(1)
DAC characteristics (continued)
Offset error
(difference between measured value
at Code (0x800) and the ideal value =
V
Gain error
Settling time (full scale: for a 10-bit
input code transition between the
lowest and the highest input codes
when DAC_OUT reaches final value
±1LSB
Max frequency for a correct
DAC_OUT change when small
variation in the input code (from code i
to i+1LSB)
Wakeup time from off state (Setting
the ENx bit in the DAC Control
register)
Power supply rejection ratio (to V
(static DC measurement
REF+
/2)
Parameter
Buffered/Non-buffered DAC
12-bit
digital to
analog
converter
DDA
Doc ID 15081 Rev 5
Buffer(1)
)
Min
3
6.5
–67
Typ
DACx_OUT
STM32F100xC, STM32F100xD, STM32F100xE
±10
±3
±12
±0.5
4
1
10
–40
Max
(1)
C
R
mV
µs
MS/s C
µs
LSB
LSB
%
dB
Unit
LOAD
LOAD
Given for the DAC in 12-bit
configuration
Given for the DAC in 10-bit at
V
Given for the DAC in 12-bit at
V
Given for the DAC in 12-bit
configuration
C
C
input code between lowest and
highest possible ones.
No R
REF+
REF+
LOAD
LOAD
LOAD
LOAD
= 3.6 V
= 3.6 V
≤ 50 pF, R
≤ 50 pF, R
≤ 50 pF, R
ai17157
, C
Comments
LOAD
LOAD
LOAD
LOAD
= 50 pF
≥ 5 kΩ
≥ 5 kΩ
≥ 5 kΩ