STAC9766XXTAEC1X IDT, Integrated Device Technology Inc, STAC9766XXTAEC1X Datasheet - Page 23
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STAC9766XXTAEC1X
Manufacturer Part Number
STAC9766XXTAEC1X
Description
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet
1.STAC9766XXTAEC1X.pdf
(97 pages)
Specifications of STAC9766XXTAEC1X
Single Supply Voltage (typ)
3.3/5V
Single Supply Voltage (min)
3.135/4.75V
Single Supply Voltage (max)
3.465/5.25V
Package Type
TQFP
Lead Free Status / RoHS Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
STAC9766XXTAEC1X
Manufacturer:
SIGMATEL
Quantity:
20 000
IDT™
TWO-CHANNEL, 20-BIT, AC’97 2.3 CODECS WITH STEREO MICROPHONE AND MIC/JACK SENSING
STAC9766/9767
TWO-CHANNEL, 20-BIT, AC’97 2.3 CODECS WITH STEREO MICROPHONE AND MIC/JACK SENSING
4.4.
4.3.3.
Clocking for Multiple CODEC Implementations
4.4.1.
CODECs configured as Secondary must power up with the BIT_CLK pin configured as an input.
Using the provided BIT_CLK signal is necessary to ensure that everything on the AC-link is synchro-
nous. BIT_CLK is the clock source (multiplied by 2 so that the internal rate is 24.576 MHz).
CODEC ID Strapping
Audio CODECs in the 48-pin package use pins 45 and 46 (defined as ID0# and ID1#) as strapping
(i.e. configuration) pins to configure the CODEC ID. The ID0# and ID1# strapping bits adopt inverted
polarity and default to 00 = Primary (via a weak internal pullup) when left floating. This eliminates the
need for external resistors for CODECs configured as Primary, and maintains backward compatibil-
ity with existing layouts that treat pins 45 and 46 as “no connect” or cap to ground. Pulldowns are
typically 1 K
To keep the system synchronous, all Primary and Secondary CODEC clocking must be derived from
the same clock source, so they are operating on the same time base. In addition, all AC-link protocol
timing must be based on the BIT_CLK signal, to ensure that everything on the AC-link will be syn-
chronous.
The following are potential 24.576 MHz clock options available to a Secondary CODEC:
•
•
•
STAC9766/9767 as a Primary CODEC
Primary devices are required to support correctly either of the following clocking options:
•
•
•
The Primary device may also optionally support the following clocking option:
•
See section 2.2.3: page14 for clock frequencies supported and configurations.
See section 2.2.3: page14 for clock frequencies supported and configurations.
Using an external 24.576 MHz signal source (external oscillator or AC‘97 Digital Controller)
Using the Primary’s XTAL_OUT
Using the Primary’s BIT_CLK output to derive 24.576 MHz
24.576 MHz crystal attached to XTAL_IN and XTAL_OUT
24.576 MHz external oscillator provided to XTAL_IN
12.288 MHz oscillator provided to the BIT_CLK input
NC (weak internal pullup)
NC (weak internal pullup)
14.318 MHz external oscillator provided to XTAL_IN
CID1 (pin 46)
pulldown
pulldown
- 10 K
and connected to Digital (not Analog) Ground.
Table 3. Recommended CODEC ID Strapping
NC (weak internal pullup)
NC (weak internal pullup)
23
CID0 (pin 45)
pulldown
pulldown
STAC9766/9767
Secondary ID 01
Secondary ID 10
Secondary ID 11
Configuration
Primary ID 00
PC AUDIO
V 7.4 12/06