STAC9766XXTAEC1X IDT, Integrated Device Technology Inc, STAC9766XXTAEC1X Datasheet - Page 74
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STAC9766XXTAEC1X
Manufacturer Part Number
STAC9766XXTAEC1X
Description
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet
1.STAC9766XXTAEC1X.pdf
(97 pages)
Specifications of STAC9766XXTAEC1X
Single Supply Voltage (typ)
3.3/5V
Single Supply Voltage (min)
3.135/4.75V
Single Supply Voltage (max)
3.465/5.25V
Package Type
TQFP
Lead Free Status / RoHS Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
STAC9766XXTAEC1X
Manufacturer:
SIGMATEL
Quantity:
20 000
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IDT™
TWO-CHANNEL, 20-BIT, AC’97 2.3 CODECS WITH STEREO MICROPHONE AND MIC/JACK SENSING
STAC9766/9767
TWO-CHANNEL, 20-BIT, AC’97 2.3 CODECS WITH STEREO MICROPHONE AND MIC/JACK SENSING
8.4.6.
8.4.7.
Bit(s) Reset Value
15:3
2
1
0
D15
OR1
D15
ST2
D7
D7
Digital Audio Control (6Ah, Page 00h)
To access Register 6Ah, Page 00h must be selected in Register 24h.
Default: 0000h
Sense Details (6Ah
Register 24h must be set to Page 01h to access this register.
Default: NA
0
0
0
0
D5:D15
G[4:0]
00000
00001
01111
10001
11111
D3:1
Bit
D4
D0
D14
OR0
D14
ST1
D6
D6
RESERVED Bits not used, should read back 0
RESERVED Bits not used, should read back 0
SPOR
Name
DO1
RESERVED
Page 01h
Table 26. Register 68h/Page 01h Bit Overview
D13
SR5
D13
ST0
D5
D5
Over-ride Register 2Ah, D12 write-lock when SPDIF_EN = 1.
All bits except SPDIF sample-rate are affected (D13-D12). Allows for sub-code
changing on-the-fly.
SPDIF Digital Output Source Selection:
DO1 = 0; PCM data from the AC-Link to SPDIF
DO1 = 1; ADC record data to SPDIF
Read/Write and only reset on POR (Power on Reset) and not by RESET#.
Read/Write and should NOT be set by the BIOS
Reserved
Read Only.
Table 25. Gain or Attenuation Examples
)
D12
SR4
D12
D4
74
S4
D4
RESERVED
Gain or Attenuation (dB relative to level-out)
D11
SR3
D11
D3
D3
S3
Bit R/W Overview
Description
+1.5 dBV
+24 dBV
-1.5 dBV
-24 dBV
0 dBV
STAC9766/9767
SPOR
D10
D10
SR2
D2
S2
D2
DO1
SR1
D9
D1
D9
D1
S1
PC AUDIO
RSVD
V 7.4 12/06
SR1
D8
D0
D8
S0
D0
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