MMA7455LR2 Freescale, MMA7455LR2 Datasheet - Page 14

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MMA7455LR2

Manufacturer Part Number
MMA7455LR2
Description
Manufacturer
Freescale
Datasheet

Specifications of MMA7455LR2

Family Name
MMA7455L
Package Type
LGA
Operating Supply Voltage (min)
2.4V
Operating Supply Voltage (typ)
2.8V
Operating Supply Voltage (max)
3.6V
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Operating Temperature Classification
Industrial
Product Depth (mm)
3mm
Product Height (mm)
1mm
Product Length (mm)
5mm
Mounting
Surface Mount
Pin Count
14
Lead Free Status / RoHS Status
Compliant

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MMA7455LR2
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CASE 3: Double Pulse Detection: X OR Y OR Z > Threshold for Pulse Duration1 < PDTime1, Latency Time, AND
X OR Y OR Z > Threshold for Pulse Duration2 < PDTime2
For motion detection with double pulse the device must be in pulse mode. PDPL in Register $19 =0 for “OR” motion condition.
The Pulse Threshold must be set in Register $1B and the Pulse Duration Time Window must also be set using Register $1C.
Then the Latency Time (time between pulses) must be set in Register $1D and then the Second Time Window must be set in
Register $1E for the time window of the second pulse. The pulse must be detected before the time window closes for the interrupt
to trigger.
$1E: Time Window for 2
up in Register $18, discussed in the
monitored by the detection source register $0A.
$1B: Pulse Detection Threshold Limit Value (Read/Write)
$1C: Pulse Duration Value (Read/Write)
14
$1D: Latency Time Value (Read/Write)
MMA7455L
When any of the events are detected, the interrupt pin (either INT1 or INT2) will go high. The interrupt pin assignment is set
PDTH[7]
Detection Source
Register
TW[7]
PD[7]
LT[7]
D7
D7
D7
D7
0
0
0
0
G
G
INT
th
Double Pulse Detection ($19 PDPL=0 indicating motion detection)
Time Window for 2
PDTH[6]
TW[6]
PD[6]
LT[6]
Pulse Detection
Time Window
D6
D6
D6
D6
0
0
0
0
nd
Pulse Value (Read/Write)
*Note th ere is up to 1.6ms
delay on the interrupt signal
Latency Time Window
(2
PDX or PDY or PDZ bit in Detection
source register is set.
PDTH[5]
nd
TW[5]
PD[5]
LT[5]
pulse ignored here)
nd
D5
D5
D5
D5
0
0
0
0
pulse $1E TW>0 indicating double pulse
Assigning, Clearing & Detecting Interrupts
PDTH[4]
Figure 6. Double Pulse Detection
TW[4]
PD[4]
LT[4]
D4
D4
D4
D4
0
0
0
0
Pulse Detection Time Window for
2
nd
pulse
PDTH[3]
TW[3]
PD[3]
LT[3]
D3
D3
D3
D3
0
0
0
0
*Note there is up to 1.6ms
delay on the interrupt sign al
Time Window >0 for 2 pulse detect
PDTH[2]
TW[2]
PD[2]
LT[2]
D2
D2
D2
D2
0
0
0
0
section on
PDTH[1]
TW[1]
PD[1]
LT[1]
D1
D1
D1
D1
0
0
0
0
Page
Time
Time
Time
15. The detection status is
Freescale Semiconductor
PDTH[0]
PD[0]
TW[0]
LT[0]
D0
D0
D0
D0
1
1
0
0
Reg $1D
Reg $1C
Function
Function
Reg $1B
Function
Reg $1E
Function
Default
Default
Default
Default
Sensors

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