MMA7455LR2 Freescale, MMA7455LR2 Datasheet - Page 23

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MMA7455LR2

Manufacturer Part Number
MMA7455LR2
Description
Manufacturer
Freescale
Datasheet

Specifications of MMA7455LR2

Family Name
MMA7455L
Package Type
LGA
Operating Supply Voltage (min)
2.4V
Operating Supply Voltage (typ)
2.8V
Operating Supply Voltage (max)
3.6V
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Operating Temperature Classification
Industrial
Product Depth (mm)
3mm
Product Height (mm)
1mm
Product Length (mm)
5mm
Mounting
Surface Mount
Pin Count
14
Lead Free Status / RoHS Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MMA7455LR2
Manufacturer:
FREESCALE
Quantity:
18 300
Part Number:
MMA7455LR2
Manufacturer:
FREESCALE
Quantity:
20 000
$08: 8bits Output Value Z (Read only)
Signed byte data (2’s complement): 0g = 8’h00
$09: Status Register (Read only)
DRDY
1: Data is ready
0: Data is not ready
DOVR
1: Data is over written
0: Data is not over written
$0A: Detection Source Register (Read only)
LDX
1: Level detection detected on X-axis
0: Level detection not detected on X-axis
LDY
1: Level detection detected on Y-axis
0: Level detection not detected on Y-axis
LDZ
1: Level detection detected on Z-axis
0: Level detection not detected on Z-axis
PDX *Note
1: Pulse is detected on X-axis at single pulse detection
0: Pulse is not detected on X-axis at single pulse detection
PDY *Note
1: Pulse is detected on Y-axis at single pulse detection
0: Pulse is not detected on Y-axis at single pulse detection
$0D: I
I2CDIS
0: I
1: I
DVAD[6:0]: I
$0E: User Information (Read Only: Optional)
UI2[7:0]: User information
Sensors
Freescale Semiconductor
ZOUT[7]
2
2
I2CDIS
C and SPI are available.
C is disabled.
0/OTP
UI[7]
LDX
D7
D7
D7
D7
D7
2
0
--
0
0
0
C Device Address (Bit 6-0: Read only, Bit 7: Read/Write)
2
C device address
ZOUT [6]
DVAD[6]
0/OTP
UI[6]
LDY
D6
D6
D6
D6
D6
0
--
0
0
0
ZOUT [5]
DVAD[5]
0/OTP
UI[5]
LDZ
D5
D5
D5
D5
D5
0
--
0
0
0
ZOUT [4]
DVAD[4]
0/OTP
UI[4]
PDX
D4
D4
D4
D4
D4
0
--
1
0
0
ZOUT [3]
DVAD[3]
0/OTP
UI[3]
PDY
D3
D3
D3
D3
D3
0
--
0
1
0
PERR
1: Parity error is detected in trim data. Then, self-test is dis-
abled
0: Parity error is not detected in trim data
PDZ *Note
1: Pulse is detected on Z-axis at single pulse detection
0: Pulse is not detected on Z-axis at single pulse detection
INT1
1: Interrupt assigned by INTRG[1:0] bits in Control 1
Register ($18) and is detected
0: Interrupt assigned by INTRG[1:0] bits in Control 1
Register ($18) and is not detected
INT2
1: Interrupt assigned by INTRG[1:0] bits in Control 1
Register ($18) and is detected
0: Interrupt assigned by INTRG[1:0] bits in Control 1
Register ($18) and is not detected
*Note: Must define DRDY to be an output to either INT1 or
not. This is done through bit DRPD located in Register $16.
Note: This bit value is not valid at double pulse detection
ZOUT [2]
DVAD[2]
0/OTP
PERR
UI[2]
PDZ
D2
D2
D2
D2
D2
0
1
0
0
ZOUT [1]
DVAD[1]
0/OTP
DOVR
INT2
UI[1]
D1
D1
D1
D1
D1
0
0
0
0
ZOUT [0]
DVAD[0]
0/OTP
DRDY
UI[0]
INT1
D0
D0
D0
D0
D0
0
1
0
0
MMA7455L
Function
Function
Function
Function
Function
Default
Default
Default
Default
Default
Bit
Bit
Bit
Bit
Bit
23

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