FW82801BA S L5PN Intel, FW82801BA S L5PN Datasheet - Page 562
FW82801BA S L5PN
Manufacturer Part Number
FW82801BA S L5PN
Description
Manufacturer
Intel
Datasheet
1.FW82801BA_S_L5PN.pdf
(671 pages)
Specifications of FW82801BA S L5PN
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AC ’97 Modem Controller Registers (D31:F6)
16.1.4
16.1.5
562
Note: For the writable bits, software must write a 1 to clear bits that are set. Writing a 0 to the bit has no
PCISTS—PCI Status Register
(Modem—D31:F6)
Address Offset:
Default Value:
Lockable:
PCISTA is a 16-bit status register. Refer to the PCI Local Bus Specification, Revision 2.3 for
complete details on each bit.
effect.
RID—Revision Identification Register
(Modem—D31:F6)
Address Offset:
Default Value:
Lockable:
10:9
2:0
7:0
Bit
Bit
15
14
13
12
11
8
7
6
5
4
3
Detected Parity Error (DPE) — RO. Not implemented. Hardwired to 0.
Signaled System Error (SSE) —RO. Not implemented. Hardwired to 0.
Master Abort Status (MAS) — R/WC.
0 = Master abort not generated by bus master AC ‘97 function.
1 = Bus Master AC ‘97 interface function, as a master, generates a master abort.
Reserved. Read as 0.
Signaled Target Abort (STA) — RO. Not implemented. Hardwired to 0.
DEVSEL# Timing Status (DEV_STS) — RO. This 2-bit field reflects the Intel
timing parameter. These read only bits indicate the ICH5's DEVSEL# timing when performing a
positive decode.
Data Parity Error Detected (DPED) — RO. Not implemented. Hardwired to 0.
Fast Back to Back Capable (FB2BC) — RO. Hardwired to 1. This bit indicates that the ICH5 as a
target is capable of fast back-to-back transactions.
User Definable Features (UDF) — RO. Not implemented. Hardwired to 0.
66 MHz Capable (66MHZ_CAP) — RO. Hardwired to 0.
Capabilities List (CAP_LIST) — RO. Indicates that the controller contains a capabilities pointer list.
The first item is pointed to by looking at configuration offset 34h.
Interrupt Status (INTS) — RO.
0 = This bit is 0 after the interrupt is cleared.
1 = This bit is 1 when the INTx# is asserted.
Reserved
Revision ID — RO. Refer to the latest Intel
Revision Identification register.
06
0290h
No
08h
See bit description
No
–
07h
®
Intel
Description
Description
ICH5 / ICH5R Specification Update for the value of the
Attribute:
Size:
Power Well:
Attribute:
Size:
Power Well:
®
82801EB ICH5 / 82801ER ICH5R Datasheet
R/WC, RO
16 bits
Core
RO
8 Bits
Core
®
ICH5's DEVSEL#
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