NH82801IO S LAFD Intel, NH82801IO S LAFD Datasheet - Page 13

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NH82801IO S LAFD

Manufacturer Part Number
NH82801IO S LAFD
Description
Manufacturer
Intel
Datasheet

Specifications of NH82801IO S LAFD

Lead Free Status / RoHS Status
Compliant
Errata
Errata
1.
Problem:
Implication:
Workaround: BIOS workaround available. See latest BIOS Spec Update for details.
Status:
2.
Problem:
Implication:
Workaround: None.
Status:
3.
Problem:
Implication:
Workaround: None.
Status:
4.
Problem:
Implication:
Workaround: None.
Status:
5.
Problem:
Implication:
Specification Update
Intel
When SW initiates a Host Controller Reset or a USB Global Reset while concurrent
traffic occurs on at least three UHCI controllers, the UHCI controller(s) may hang.
Note:
System may hang.
No Fix. For steppings affected, see the Summary Table of Changes.
Intel
The ICH9 1.5Gb/s SATA transmit buffers have been designed to maximize performance
and robustness over a variety of routing scenarios. As a result, the ICH9 SATA 1.5 Gb/s
(Gen1i and Gen1m) transmit signaling voltage levels may exceed the maximum
motherboard TX connector and device RX connector voltage specification (section 7.2.1
of Serial ATA Specification, rev 2.5).
None known.
No Fix. For steppings affected, see the Summary Table of Changes.
Intel
ICH9 High-speed USB 2.0 V
None known.
No Fix. For steppings affected, see the Summary Table of Changes.
Intel ICH9 THRM Polarity on SMBus
When THRM#_POL (PMBASE+42h:bit0) is set to high, the THRM# pin state as reported
to the SMBus TCO unit is logically inverted.
If the THRM#_POL bit is set to high, an external SMBus master reading the BTI
Temperature Event status will not receive the correct state of the THRM# pin. The value
will be logically inverted. If THRM#_POL is set to low, value is correct.
No Fix. For steppings affected, see the Summary Table of Changes.
Intel ICH9 SPI_CS1# State
After resuming from S3-S5, the ICH9 SPI_CS1# signal may initially drive a low voltage
on the pin.
If only one SPI device is populated on the system, there is no impact.
If two SPI devices are populated, system may hang when resuming from S3-S5.
— The maximum expected V
®
®
®
ICH9 UHCI Hang with USB Reset
ICH9 1.5 Gb/s SATA Signal Voltage Level
ICH9 High-speed USB 2.0 V
The issue has only been replicated in a synthetic reset test environment.
HSOH
may not meet the USB 2.0 specification.
HSOH
is 460mV.
HSOH
13

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