FDC37C78-HT Standard Microsystems (SMSC), FDC37C78-HT Datasheet - Page 23

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FDC37C78-HT

Manufacturer Part Number
FDC37C78-HT
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet

Specifications of FDC37C78-HT

Package Type
TQFP
Lead Free Status / RoHS Status
Compliant

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* D= Decimal
BIT NO.
7
6
5
4
3
2
1
0
EN
DE
OR
ND
NW
MA
SYMBOL
End of
Cylinder
Data Error
Overrun/
Underrun
No Data
Not Writable
Missing
Address Mark
NAME
Table 15 - Status Register 1
The FDC tried to access a sector beyond the final sector
of the track (255D*). Will be set if TC is not issued after
Read or Write Data command.
Unused. This bit is always "0".
The FDC detected a CRC error in either the ID field or
the data field of a sector.
Becomes set if the FDC does not receive CPU or DMA
service within the required time interval, resulting in data
overrun or underrun.
Unused. This bit is always "0".
Any one of the following:
1.
2.
3.
WP pin became a "1" while the FDC is executing a Write
Data, Write Deleted Data, or Format A Track command.
Any one of the following:
1.
2.
23
index pulse from the IDX pin twice.
specified track.
or
the FDC did not find the specified sector.
find the proper sector sequence.
at the specified track after encountering the
ID field without an error.
Read Data, Read Deleted Data command -
Read ID command - the FDC cannot read the
Read A Track command - the FDC cannot
The FDC did not detect an ID address mark
The FDC cannot detect a data address mark
a
deleted
DESCRIPTION
data address mark on the

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