FDC37C78-HT Standard Microsystems (SMSC), FDC37C78-HT Datasheet - Page 58

• Manufacturer Part Number: FDC37C78-HT
• Manufacturer: Standard Microsystems (SMSC)

Specifications of FDC37C78-HT

• Package Type: TQFP
• Lead Free Status / RoHS Status: Compliant

Power management capabilities are provided for
the floppy disk. Two types of power management
are
powerdown.
Direct powerdown is controlled by the powerdown
bit in the configuration registers. Auto Powerdown
can be enabled by setting the Auto Powerdown
Enable bit in the configluation registers.
FDC Power Management
Direct power management is controlled by bit 3 of
Configuration Register 0(CR0). Refer to CR0 bit
3 for more information.
Auto Power Management is enabled by CR7 bit 7.
when all of the following conditions have been met:
1.
2.
3.
4.
An internal timer is initiated as soon as the auto
powerdown command is enabled. The part is
then powered down when all the conditions are
met.
timer, any operation of read MSR or read/write
data (FIFO) will reinitiate the timer.
When set, this bit allows FDC to enter powerdown
The motor enable pins of register DOR are
inactive (zero).
The part must be idle; MSR=80H and INT = 0
(INT may be high even if MSR = 80H due to
polling interrupts).
The internal head unload timer must have
expired.
The Auto powerdown timer (10msec) must
have timed out.
provided;
During the countdown of the powerdown
direct
powerdown
AUTO POWER MANAGEMENT
and
auto
58
Disabling the auto powerdown mode cancels the
timer and holds the FDC37C78 out
powerdown.
DSR From Powerdown
If DSR powerdown is used when the part is in auto
powerdown, the DSR powerdown will override the
auto powerdown.
awakened from DSR powerdown, the auto
powerdown will once again become effective.
Wake Up From Auto Powerdown
If the part enters the powerdown state through the
auto powerdown mode, then the part can be
awakened by reset or by appropriate access to
certain registers.
If a hardware or software reset is used then the
part will go through the normal reset sequence. If
the access is through the selected registers, then
the FDC37C78 resumes operation as though it
was never in powerdown. Besides activating the
RESET pin or one of the software reset bits in the
DOR or DSR, the following register accesses will
wake up the part:
1.
2.
3.
Enabling any one of the motor enable bits in
the DOR register (reading the DOR does not
awaken the part).
A read from the MSR register.
A read or write to the Data register.
However, when the part is
of auto