FDC37C935-QS Standard Microsystems (SMSC), FDC37C935-QS Datasheet - Page 111

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FDC37C935-QS

Manufacturer Part Number
FDC37C935-QS
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet

Specifications of FDC37C935-QS

Lead Free Status / RoHS Status
Supplier Unconfirmed
The FDC37C93x provides a set of flexible
Input/Output control functions to the system
designer through a set of General Purpose I/O
pins (GPI/O). These GPI/O pins may perform
simple I/O or may be individually configured to
provide a predefined alternate function. Power-
on reset configures all GPI/O pins as simple
non-inverting inputs.
Note 1: 8042 P21 is normally used for Gate A20
Note 2: 8042 P20 is normally used for the Keyboard Reset Output
GPI/O PORT
* These are input-type alternate functions; all other GPI/O pins contain output-type alternate
functions.
GP10
GP11
GP12
GP13
GP14
GP15
GP16
GP17
GP20
GP21
GP22
GP23
GP24
GP25
GENERAL PURPOSE I/O FUNCTIONAL DESCRIPTION
Table 46 - General Purpose I/O Port Assignments
Joystick RD Strobe/Joystick Chip Sel
WD Timer Output or IRRX Input
IDE2 Buffer Enable/8042 P20
Power LED or IRTX Output
ALTERNATE FUNCTION
Serial EEPROM Data Out
Serial EEPROM Data In *
Serial EEPROM Enable
Serial EEPROM Clock
GP Address Decoder
Joystick WR Strobe
Interrupt Steering *
Interrupt Steering *
GP Write Strobe
8042 P21
111
General Purpose I/O Ports
The
programmable
(GPI/O). Each GPI/O port is represented as a
bit in one of two GPI/O 8-bit registers, GP1 or
GP2.
Each GPI/O port and its alternate function is
listed in Table 46.
FDC37C93x
Only 6 bits of GP2 are implemented.
general
REGISTER ASSIGNMENT
has
purpose
GP1, bit 0
GP1, bit 1
GP1, bit 2
GP1, bit 3
GP1, bit 4
GP1, bit 5
GP1, bit 6
GP1, bit 7
GP2, bit 0
GP2, bit 1
GP2, bit 2
GP2, bit 3
GP2, bit 4
GP2, bit 5
14
independently
I/0
ports

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