FDC37C935-QS Standard Microsystems (SMSC), FDC37C935-QS Datasheet - Page 98

• Manufacturer Part Number: FDC37C935-QS
• Manufacturer: Standard Microsystems (SMSC)

Specifications of FDC37C935-QS

• Lead Free Status / RoHS Status: Supplier Unconfirmed

Command/Data
ECP Mode supports two advanced features to
improve the effectiveness of the protocol for
some
implemented by allowing the transfer of normal
8-bit data or 8-bit commands.
When in the forward direction, normal data is
transferred when HostAck is high and an 8-bit
command is transferred when HostAck is low.
Data Compression
The ECP port supports run length encoded
(RLE) decompression in hardware and can
transfer compressed data to a peripheral. Run
length encoded (RLE) compression in hardware
is not supported. To transfer compressed data
in ECP mode, the compression count is written
to the ecpAFifo and the data byte is written to
the ecpDFifo.
Compression is accomplished by counting
identical bytes and transmitting an RLE byte
that indicates how many times the next byte is
to be repeated.
intercepts the RLE byte and repeats the
following byte the specified number of times.
When a run-length count is received from a
peripheral,
replicated the specified number of times. A
run-length count of zero specifies that only one
byte of data is represented by the next data
byte, whereas a
indicates that the next byte should be expanded
to 128 bytes. To prevent data expansion,
applications.
the
subsequent
run-length
Decompression simply
The
Reverse Channel Commands (PeripAck Low)
Forward Channel Commands (HostAck Low)
D7
0
1
data
count
features
Run-Length Count (0-127)
(mode 0011 0X00 only)
Channel Address (0-127)
byte
of 127
are
Table 42
is
98
D[6:0]
indicates whether it is a run-length count (for
compression) or a channel address.
When in the reverse direction, normal data is
transferred when PeriphAck is high and an 8-bit
command is transferred when PeriphAck is low.
The most significant bit of the command is
always zero. Reverse channel addresses are
seldom used and may not be supported in
hardware.
however, run-length counts of zero should be
avoided.
Pin Definition
The drivers for nStrobe, nAutoFd, nInit and
nSelectIn are open-collector in mode 000 and
are push-pull in all other modes.
ISA Connections
The interface can never stall causing the host to
hang. The width of data transfers is strictly
controlled on an I/O address basis per this
specification. All FIFO-DMA transfers are byte
wide, byte aligned and end on a byte boundary.
Configuration Register A, cnfgA, described in
the next section.)
are
mode using program control of the control
signals.
(The PWord value can be obtained by reading
always possible with standard or PS/2
Single byte wide transfers