MC33580BAPNA Freescale, MC33580BAPNA Datasheet - Page 12

• Manufacturer Part Number: MC33580BAPNA
• Manufacturer: Freescale

Specifications of MC33580BAPNA

• Switch Type: High Side
• Power Switch Family: MC33580
• Input Voltage: 6 to 27V
• Power Switch On Resistance: 30mOhm
• Number Of Outputs: 4
• Mounting: Surface Mount
• Supply Current: 20mA
• Package Type: Power QFN
• Operating Temperature (min): -40C
• Operating Temperature Classification: Automotive
• Pin Count: 24
• Lead Free Status / RoHS Status: Compliant

Table 4. Dynamic Electrical Characteristics (continued)
otherwise noted. Typical values noted reflect the approximate parameter means at T
otherwise noted.
12
SPI INTERFACE CHARACTERISTICS
Notes
33580
ELECTRICAL CHARACTERISTICS
DYNAMIC ELECTRICAL CHARACTERISTICS
Maximum Frequency of SPI Operation
Required Low State Duration for
Rising Edge of
Rising Edge of
Falling Edge of
Required High State Duration of SCLK (Required Setup Time)
Required Low State Duration of SCLK (Required Setup Time)
Falling Edge of SCLK to Rising Edge of
SI to Falling Edge of SCLK (Required Setup Time)
Falling Edge of SCLK to SI (Required Setup Time)
SO Rise Time
SO Fall Time
SI,
SI,
Time from Falling Edge of
Time from Rising Edge of
Time from Rising Edge of SCLK to SO Data Valid
26.
27.
28.
29.
30.
31.
Characteristics noted under conditions 6.0 V ≤ V
C
C
0.2 V
CS
CS
L
L
, SCLK, Incoming Signal Rise Time
, SCLK, Incoming Signal Fall Time
= 200 pF
= 200 pF
RST
Maximum setup time required for the 33580 is the minimum guaranteed time needed from the microcontroller.
Rise and Fall time of incoming SI,
Time required for output status data to be available for use at SO. 1.0 kΩ on pullup on
Time required for output status data to be terminated at SO. 1.0 kΩ on pullup on
Time required to obtain valid data out from SO following the rise of SCLK.
DD
low duration measured with outputs enabled and going to OFF or disabled condition.
≤ SO ≤ 0.8 V
CS
RST
CS
to Falling Edge of
to Rising Edge of SCLK (Required Setup Time)
to Falling Edge of
DD
CS
CS
, C
Characteristic
to SO High Impedance
to SO Low Impedance
L
= 200 pF
RST
CS
(26)
CS
CS
CS
(Required Setup Time)
(28)
(Required Setup Time)
(28)
, and SCLK signals suggested for design consideration to prevent the occurrence of double pulsing.
(Required Setup Time)
(31)
(28)
(28)
(29)
(30)
PWR
≤ 27 V, 4.5 V ≤ V
(27)
(27)
(27)
(27)
(27)
(27)
t
t
Symbol
t
t
SI (HOLD)
t
WSCLKh
t
t
WSCLKl
SO(DIS)
t
t
SO(EN)
t
DD
SI (SU)
t
WRST
t
t
VALID
f
LEAD
t
t
ENBL
t
RSO
LAG
FSO
SPI
RSI
FSI
CS
≤ 5.5 V, - 40°C ≤ T
CS
.
CS
A
= 25°C under nominal conditions unless
.
Min
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
Analog Integrated Circuit Device Data
A
≤ 125°C, GND = 0 V unless
Typ
50
50
50
25
25
25
25
65
65
–
–
–
–
–
–
–
–
Freescale Semiconductor
Max
350
300
167
167
167
167
145
145
105
3.0
5.0
83
83
50
50
50
50
MHz
Unit
ns
ns
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns