DSP56321VF275 Freescale, DSP56321VF275 Datasheet - Page 78
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DSP56321VF275
Manufacturer Part Number
DSP56321VF275
Description
Manufacturer
Freescale
Datasheet
1.DSP56321VF275.pdf
(84 pages)
Specifications of DSP56321VF275
Device Core Size
24b
Format
Fixed Point
Clock Freq (max)
275MHz
Mips
275
Device Input Clock Speed
275MHz
Ram Size
576KB
Operating Supply Voltage (typ)
1.6/3.3V
Operating Supply Voltage (min)
1.5/3/3/3/3/3/3V
Operating Temp Range
-40C to 100C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
196
Package Type
MA-BGA
Lead Free Status / RoHS Status
Not Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DSP56321VF275
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Power Consumption Benchmark
A-14
M_Z EQU 2
M_N EQU 3
M_U EQU 4
M_E EQU 5
M_L EQU 6
M_S EQU 7
M_I0 EQU 8
M_I1 EQU 9
M_S0 EQU 10
M_S1 EQU 11
M_SC EQU 13
M_DM EQU 14
M_LF EQU 15
M_FV EQU 16
M_SA EQU 17
M_CE EQU 19
M_SM EQU 20
M_RM EQU 21
M_CP0 EQU 22
M_CP1 EQU 23
;
M_CDP EQU $300; mask for CORE-DMA priority bits in OMR
M_MA
M_MB
M_MC
M_MD
M_EBD EQU 4
M_SD EQU 6
M_MS EQU 7
M_CDP0 EQU 8
M_CDP1 EQU 9
M_BEN
M_TAS
M_BRT
M_ATE EQU 15
M_XYS EQU 16
M_EUN EQU 17
M_EOV EQU 18
M_WRP EQU 19
M_SEN EQU 20
;*************************************************************************
;
;
;
;*************************************************************************
intequ
I_VEC EQU $0
EQUATES for DSP56321 interrupts
page
opt
if
else
endif
equ1
EQU 11
EQU 12
control and status bits in OMR
equ0
equ2
equ3
EQU 10
ident
132,55,0,0,0
mex
@DEF(I_VEC)
1,0
DSP56321 Technical Data, Rev. 11
; Zero
; Negative
; Unnormalized
; Extension
; Limit
; Scaling Bit
; Interupt Mask Bit 0
; Interupt Mask Bit 1
; Scaling Mode Bit 0
; Scaling Mode Bit 1
; Sixteen_Bit Compatibility
; Double Precision Multiply
; DO-Loop Flag
; DO-Forever Flag
; Sixteen-Bit Arithmetic
; Instruction Cache Enable
; Arithmetic Saturation
; Rounding Mode
; bit 0 of priority bits in SR
; bit 1 of priority bits in SR
; Operating Mode A
; Operating Mode B
; Operating Mode C
; Operating Mode D
; External Bus Disable bit in OMR
; Stop Delay
; Memory Switch bit in OMR
; bit 0 of priority bits in OMR
; bit 1 of priority bits in OMR
; Burst Enable
; TA Synchronize Select
; Bus Release Timing
; Address Tracing Enable bit in OMR.
; Stack Extension space select bit in OMR.
; Extensed stack UNderflow flag in OMR.
; Extended stack OVerflow flag in OMR.
; Extended WRaP flag in OMR.
; Stack Extension Enable bit in OMR.
;leave user definition as is.
Freescale Semiconductor