MC9S12XDT512CAA Freescale, MC9S12XDT512CAA Datasheet - Page 1017

• Manufacturer Part Number: MC9S12XDT512CAA
• Manufacturer: Freescale

Specifications of MC9S12XDT512CAA

• Cpu Family: HCS12
• Device Core Size: 16b
• Frequency (max): 40MHz
• Interface Type: CAN/I2C/SCI/SPI
• Total Internal Ram Size: 32KB
• # I/os (max): 59
• Number Of Timers - General Purpose: 12
• Operating Supply Voltage (typ): 2.5/5V
• Operating Supply Voltage (max): 2.75/5.5V
• Operating Supply Voltage (min): 2.35/3.15V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 80
• Package Type: PQFP
• Program Memory Type: Flash
• Program Memory Size: 512KB
• Lead Free Status / RoHS Status: Compliant

PPSH[7:0]
PIEH[7:0]
Reset
Reset
Field
24.0.5.48 Port H Interrupt Enable Register (PIEH)
Read: Anytime.
Write: Anytime.
This register disables or enables on a per-pin basis the edge sensitive external interrupt associated
with Port H.
Field
24.0.5.49 Port H Interrupt Flag Register (PIFH)
Read: Anytime.
Write: Anytime.
Each flag is set by an active edge on the associated input pin. This could be a rising or a falling
edge based on the state of the PPSH register. To clear this flag, write logic level “1” to the
corresponding bit in the PIFH register. Writing a “0” has no effect.
7–0
7–0
W
W
R
R
PIEH7
PIFH7
Polarity Select Port H
0 Falling edge on the associated port H pin sets the associated flag bit in the PIFH register.
1 Rising edge on the associated port H pin sets the associated flag bit in the PIFH register.
Interrupt Enable Port H
0 Interrupt is disabled (interrupt flag masked).
1 Interrupt is enabled.
7
0
7
0
A pull-up device is connected to the associated port H pin, if enabled by the associated bit in register PERH
and if the port is used as input.
A pull-down device is connected to the associated port H pin, if enabled by the associated bit in register PERH
and if the port is used as input.
PIEH6
PIFH6
0
0
6
6
Figure 24-50. Port H Interrupt Enable Register (PIEH)
Figure 24-51. Port H Interrupt Flag Register (PIFH)
Table 24-44. PPSH Field Descriptions
Table 24-45. PIEH Field Descriptions
PIEH5
PIFH5
5
0
5
0
PIEH4
PIFH4
0
0
4
4
Description
Description
PIEH3
PIFH3
3
0
3
0
PIEH2
PIFH2
0
0
2
2
PIEH1
PIFH1
1
0
1
0
PIEH0
PIFH0
0
0
0
0