SSTUA32S869BHLFT IDT, Integrated Device Technology Inc, SSTUA32S869BHLFT Datasheet - Page 16

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SSTUA32S869BHLFT

Manufacturer Part Number
SSTUA32S869BHLFT
Description
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet

Specifications of SSTUA32S869BHLFT

Logic Family
SSTU
Logical Function
Reg Bfr W/ParityTst
Number Of Elements
1
Number Of Bits
14
Number Of Inputs
14
Number Of Outputs
28
High Level Output Current
-8mA
Low Level Output Current
8mA
Propagation Delay Time
3ns
Operating Supply Voltage (typ)
1.8V
Operating Supply Voltage (max)
1.9V
Operating Supply Voltage (min)
1.7V
Clock-edge Trigger Type
Posit/Negat-Edge
Polarity
Non-Inverting
Technology
CMOS
Frequency (max)
340(Min)MHz
Mounting
Surface Mount
Pin Count
150
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Compliant
1173—10/28/05
(1) C
V
V
V
t
PLH
TT
ICR
i(P-P)
= V
L
and t
Cross Point Voltage
Figure 23 — Partial parity out voltage waveform, propagation delay time with respect to CLK input
includes probe and jig capacitance.
= 600mV
DD
PHL
/2
are the same as t
CK
CK
Output
PD
.
DUT
Figure 22 — Partial parity out load circuit
OUT
V
t
PLH
ICR
C
See Note
L
=5pF
V
TT
(1)
16
R
Testpoint
L
=1K
V
t
PHL
ICR
Advance Information
V
TT
ICSSSTUA32S869B
V
i(P-P)

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