TSEV83102G0BGL E2V, TSEV83102G0BGL Datasheet - Page 50

• Manufacturer Part Number: TSEV83102G0BGL
• Manufacturer: E2V

Specifications of TSEV83102G0BGL

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Applying the TS83102G0B with the TS81102G0 Demultiplexer
50
TS83102G0B
The TS83102G0B output data rate can be demultiplexed 4 or 8 times by using the
TS81102G0 (8/10-bit parallel channel 2 Gsps 1:4/1:8 demultiplexer).
The ADC’s evaluation of static and dynamic performances can be done using the
TSEV83102G0BGL ADC evaluation board, coupled with the TS81102G0 DMUX evaluation
board and an acquisition system.
The following block diagram shows a typical characterization set-up.
Figure 58. Characterization Setup
A separate technical specification of the TS81102G0 demultiplexer is available. Refer to this
document for further information on the device.
Note:
For more information, refer to the “DEMUX and ADCs Application Notes”.
1 GHz
2 GHz
Vin
ADC Clk
Board
ADC
Data Ready
Data In
ClkIn
DEMUX
Board
Data Out
Data Out
8
High Speed
Acquisition
HF Oscillo
System
2101D–BDC–06/04