STM32F217ZGT6 STMicroelectronics, STM32F217ZGT6 Datasheet - Page 114

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STM32F217ZGT6

Manufacturer Part Number
STM32F217ZGT6
Description
MCU ARM 1024KB FLASH 144LQFP
Manufacturer
STMicroelectronics
Series
STM32r
Datasheets

Specifications of STM32F217ZGT6

Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
120MHz
Connectivity
CAN, Ethernet, I²C, IrDA, LIN, MMC, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, LCD, POR, PWM, WDT
Number Of I /o
114
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
132K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 24x12b; D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Cpu Family
STM32
Device Core
ARM Cortex-M3
Device Core Size
32b
Frequency (max)
120MHz
Total Internal Ram Size
132KB
# I/os (max)
114
Number Of Timers - General Purpose
14
Operating Supply Voltage (typ)
2.5/3.3V
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
1.8V
On-chip Dac
2(2-chx12-bit)
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
144
Package Type
LQFP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
497-11189

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
STM32F217ZGT6
Manufacturer:
STMicroelectronics
Quantity:
83
Part Number:
STM32F217ZGT6
Manufacturer:
ST
0
Part Number:
STM32F217ZGT6
0
Electrical characteristics
Table 63.
1. Guaranteed by design, not tested in production.
2. Guaranteed by characterization, not tested in production.
114/158
INL
Offset
Gain
error
t
THD
Update
rate
t
PSRR+
SETTLING
WAKEUP
Symbol
(2)
(1)
(2)
(2)
(2)
(1)
(2)
(2)
Integral non linearity
(difference between
measured value at Code i
and the value at Code i on a
line drawn between Code 0
and last Code 1023)
Offset error
(difference between
measured value at Code
(0x800) and the ideal value =
V
Gain error
Settling time (full scale: for a
10-bit input code transition
between the lowest and the
highest input codes when
DAC_OUT reaches final
value ±4LSB
Total Harmonic Distortion
Buffer ON
Max frequency for a correct
DAC_OUT change when
small variation in the input
code (from code i to i+1LSB)
Wakeup time from off state
(Setting the ENx bit in the
DAC Control register)
Power supply rejection ratio
(to V
measurement)
DAC characteristics (continued)
REF+
DDA
/2)
) (static DC
Parameter
Min
-
-
-
-
-
-
-
-
-
-
-
Doc ID 17050 Rev 4
Typ
–67
6.5
3
-
-
-
-
-
-
-
-
Max
±0.5
±10
±12
–40
±1
±4
±3
10
6
1
-
MS/s
Unit
LSB
LSB
LSB
LSB
mV
dB
dB
µs
µs
%
Given for the DAC in 10-bit
configuration.
Given for the DAC in 12-bit
configuration.
Given for the DAC in 12-bit
configuration
Given for the DAC in 10-bit at
V
Given for the DAC in 12-bit at
V
Given for the DAC in 12-bit
configuration
C
R
C
R
C
R
C
input code between lowest and
highest possible ones.
No R
STM32F215xx, STM32F217xx
REF+
REF+
LOAD
LOAD
LOAD
LOAD
LOAD
LOAD
LOAD
LOAD
= 3.6 V
= 3.6 V
≤ 50 pF,
≥ 5 kΩ
≤ 50 pF,
≥ 5 kΩ
≤ 50 pF,
≥ 5 kΩ
≤ 50 pF, R
, C
Comments
LOAD
LOAD
= 50 pF
≥ 5 kΩ

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