STM32F217ZGT6 STMicroelectronics, STM32F217ZGT6 Datasheet - Page 155

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STM32F217ZGT6

Manufacturer Part Number
STM32F217ZGT6
Description
MCU ARM 1024KB FLASH 144LQFP
Manufacturer
STMicroelectronics
Series
STM32r
Datasheets

Specifications of STM32F217ZGT6

Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
120MHz
Connectivity
CAN, Ethernet, I²C, IrDA, LIN, MMC, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, LCD, POR, PWM, WDT
Number Of I /o
114
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
132K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 24x12b; D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Cpu Family
STM32
Device Core
ARM Cortex-M3
Device Core Size
32b
Frequency (max)
120MHz
Total Internal Ram Size
132KB
# I/os (max)
114
Number Of Timers - General Purpose
14
Operating Supply Voltage (typ)
2.5/3.3V
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
1.8V
On-chip Dac
2(2-chx12-bit)
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
144
Package Type
LQFP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
497-11189

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STM32F215xx, STM32F217xx
Table 88.
22-Apr-2011
Date
Document revision history (continued)
Revision
4
Changed datasheet status to “Full Datasheet”.
APB1 frequency changed form 36 MHz to 30 MHz.
Introduced concept of SRAM1 and SRAM2.
LQFP176 now in production.
Removed WLCSP64+2 package.
Updated
Compatible board design:
Added camera interface for STM32F217Vx devices in
STM32F215xx and STM32F217xx: features and peripheral
Removed 16 MHz internal RC oscillator accuracy in
Clocks and
Updated
Modified I
and
Section 2.2.35: Audio PLL
Updated
backup registers
General-purpose timers
Modified maximum baud rate (oversampling by 16) for USART1 in
Table 4: USART feature
Updated note related to RFU pin below
LQFP100
STM32F21x LQFP176
ballout, and
Added RTC_50Hz as PB15 alternate function, and TT (3.6 V tolerant
I/O) in
Alternate function
PA15 added in
In
I2S3_CK to I2S2_SCK and I2S3_SCK, respectively.
Removed ETH _RMII_TX_CLK for PC3/AF11 in
function
Updated
characteristics.
T
Added CEXT and ESR in
well as
Modified
power supply
Updated
(regulator
power-down (regulator
Added OSC_OUT pin in
Figure 15: Pin input
Updated notes below
Updated V
I
power control block
RUSH
STG
Table 5: STM32F21x pin and ball
Doc ID 17050 Rev 4
startup,
updated to –65 to +150 in
, added E
Table 5: STM32F21x pin and ball definitions
Section 5.3.2: VCAP1/VCAP2 external
mapping.
Figure 1: Compatible board design: LQFP144
Section 2.2.17: Voltage
Section 2.2.18: Real-time clock (RTC), backup SRAM and
Table 7: Voltage characteristics
Note 3
Table 12: Operating conditions at power-up / power-down
2
pinout,
ON), and
PVD
S sampling frequency range in
startup.
Table 5: STM32F21x pin and ball
Section 2.2.29: Inter-integrated sound
range.
, V
Table 5: STM32F21x pin and ball
RUSH
in
BOR1
and description of TIM2 and TIM5 in
Figure 10: STM32F21x LQFP144
mapping.
Table 11: Limitations depending on the operating
characteristics.
Table 13: Operating conditions at power-up /
voltage.
and
Figure 14: Pin loading
, V
pinout,
OFF).
comparison.
(TIMx).
BOR2
Figure 14: Pin loading
Note 3
Table 10: General operating conditions
LQFP100.
(PLLI2S).
, V
Changes
Figure 12: STM32F21xxx UFBGA176
Table 9: Thermal
BOR3
in
regulator.
Table 14: Embedded reset and
definitions, changed I2S2_CK and
, T
Figure 9: STM32F21x
RSTTEMPO
and
conditions.
Table 6: Alternate
Table 8: Current
Section 2.2.13: Clocks
definitions.
capacitor.
conditions. and
definitions.
characteristics.
typical value, and
(I2S), and
and
pinout,
Revision history
Section 2.2.13:
Table 2:
Section :
and
Table 6:
Figure 11:
counts.
Figure 2:
155/158
as

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