ICS95V842AFLFT IDT, Integrated Device Technology Inc, ICS95V842AFLFT Datasheet
ICS95V842AFLFT
Specifications of ICS95V842AFLFT
Related parts for ICS95V842AFLFT
ICS95V842AFLFT Summary of contents
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DDR Phase Lock Loop Clock Driver (60MHz - 220MHz) Recommended Application: 1:2 DDRI Clock Driver Product Description/Features: • Low skew, low jitter PLL clock driver • Feedback pins for input to output synchronization • Spread Spectrum tolerant inputs • With ...
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ICS95V842 Pin Descriptions PIN # PIN NAME PIN TYPE 1 VDD2.5 PWR 2 DDRT0 OUT 3 DDRC0 OUT 4 GND PWR 5 CLK_INT IN 6 CLK_INC IN 7 AVDD PWR 8 AGND PWR 9 FB_OUTC OUT 10 FB_OUTT OUT 11 ...
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Absolute Maximum Ratings Supply Voltage: (VDD & AVDD -0.5V to 3.6V Input clamp current: I (VI < > VDD ...
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ICS95V842 DC Electrical Characteristics TA = 0°C to +85°C; Supply Voltage AVDD, VDD = 2.5 V +/- 0.2V (unless otherwise stated) PARAMETER SYMBOL Supply Voltage V DDQ Low level input voltage High level input voltage V DC input signal voltage ...
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Switching Characteristics T = 0°C to +85°C; Supply Voltage AVDD, VDD = 2.5 V +/- 0.2V (unless otherwise stated) A PARAMETER 3 Max clock frequency Application Frequency 3 Range Input clock duty cycle Input clock slew rate CLK stabilization Low-to ...
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ICS95V842 V DD/2 ICS95V842 -V DD/2 NOTE: V (TT) = GND Y , FB_OUTC FB_OUTT X 0830B—11/24/08 Parameter Measurement Information (CLKC) V (CLKC) ICS95V842 GND Figure 1. IBIS Model Output Load ...
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CLK_INC CLK_INT FB_INC FB_INT FB_OUTC FB_OUTT FB_OUTC FB_OUTT FB_OUTC FB_OUTT X 0830B—11/24/08 Parameter Measurement Information ...
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ICS95V842 Y , FB_OUTC FB_OUTT X 20% Clock Inputs and Outputs 0830B—11/24/08 Parameter Measurement Information t (hper_n+1) t (hper_n (jit_Hper) (jit_Hper_n) 2xf O Figure 7. Half-Period Jitter 80% Rise ...
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Ordering Information 95V842yFzLF-T XXXX 0830B—11/24/08 16-Lead, 150 mil SSOP (QSOP) In Millimeters SYMBOL COMMON DIMENSIONS MIN MAX A 1.35 1.75 A1 0.10 0. 1.50 b 0.20 0.30 c 0.18 0.25 D SEE ...