ICS9FGP202AKLFT IDT, Integrated Device Technology Inc, ICS9FGP202AKLFT Datasheet

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ICS9FGP202AKLFT

Manufacturer Part Number
ICS9FGP202AKLFT
Description
IC FREQ TIMING GENERATOR 40VFQFN
Manufacturer
IDT, Integrated Device Technology Inc
Type
Frequency Generatorr
Datasheet

Specifications of ICS9FGP202AKLFT

Input
Clock
Output
Clock
Frequency - Max
400MHz
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
40-VFQFN, 40-VFQFPN
Frequency-max
400MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
9FGP202AKLFT

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Frequency Timing Generator for Peripherals
Recommended Application:
CK-MNG for Intel servers
1339C—09/14/09
Power up default is highlighted.
Power Supply Pins
Note: All VDD should be connected to a common power rail with proper
filtering and decoupling.
Functionality
Byte0 Bit2 Byte0 Bit1 Byte0 Bit0
CPU FS2
1 - 0.7V current-mode differential CPU pair
8 - 50MHz 3.3V RMII outputs
1 - DOT 96MHz output
1 - 33.33MHz output
1 - 32.768KHz output
2 - 25MHz REF outputs
0ppm synthesis error on CPU, RMII & 33.33MHz clocks
+/- 100ppm frequency accuracy on other clocks
Selectable SMBus Address - D0/D1 or C0/C1
Spread Spectrum compability on CPU and DOT 96MHz
clocks
M/N programming on CPU and DOT 96MHz clocks via
SMBus
Outputs can be disabled via pins or SMBus
0
0
0
0
1
1
1
1
26,34
VDD
12
23
15
9
2
Pin Number
Integrated
Circuit
Systems, Inc.
CPU FS1
0
0
1
1
0
0
1
1
27,35
GND
10
14
21
18
1
CPU FS0
0
1
0
1
0
1
0
1
Reserved
CPUCLK
266.67
133.33
200.00
166.67
333.33
100.00
400.00
MHz
50 MHz RMII outputs
XTAL, REF outputs
DOT96SS
32.768KHz output
DOT96SS output
33.33MHz output
CPUCLK output
96.00
96.00
96.00
96.00
96.00
96.00
96.00
96.00
MHz
Description
33.33
33.33
33.33
33.33
33.33
33.33
33.33
33.33
33.33
MHz
Pin Configurations
DOT96SSC 4
CPUCLKC0 8
DOT96SST 3
CPUCLKT0 7
GNDCPU 10
VDDCPU 9
OE_CPU 6
VDD96 2
OE_96 5
50.00
50.00
50.00
50.00
50.00
50.00
50.00
50.00
RMII
MHz
GND 1
40 39 38 37 36 35 34 33 32 31
11 12 13 14 15 16 17 18 19 20
25.00
25.00
25.00
25.00
25.00
25.00
25.00
25.00
MHz
25
** Internal Pull-Dow n Resistor
* Internal Pull-Up Resistor
9FGP202A
40-MLF
SMBus Address Selection
* Default value
*SMBADR = 0
32.768
32.768
32.768
32.768
32.768
32.768
32.768
32.768
32.768
KHz
D0/D1
SMBADR
ICS9FGP202A
SMBADR = 1
30 OE_RMIIB
29 RMII4
28 RMII5
27 GNDRMII
26 VDDRMII
25 RMII6
24 RMII7
23 VDD33
22 33.33MHZ/**SMBADR
21 GND33
C0/C1

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ICS9FGP202AKLFT Summary of contents

Page 1

Integrated Circuit Systems, Inc. Frequency Timing Generator for Peripherals Recommended Application: CK-MNG for Intel servers • 0.7V current-mode differential CPU pair • 50MHz 3.3V RMII outputs • DOT 96MHz output • 33.33MHz ...

Page 2

Integrated Circuit Systems, Inc. Pin Description PIN PIN # PIN NAME TYPE 1 GND PWR 2 VDD96 PWR 3 DOT96SST OUT 4 DOT96SSC OUT 5 OE_96 IN 6 OE_CPU IN 7 CPUCLKT0 OUT 8 CPUCLKC0 OUT 9 VDDCPU PWR 10 ...

Page 3

Integrated Circuit Systems, Inc. The is a peripheral clock for Intel Servers. An SMBus interface allows full control of the device. X1_25 XTAL X2_25 VttPwr_GD/PD# OE_CPU OE_96 CONTROL OE_RMIIA LOGIC OE_RMIIB SMBADR SMBDAT SMBCLK 1339C—09/14/09 CPU PLL (SPREAD CAPABLE) DOT ...

Page 4

Integrated Circuit Systems, Inc. ICS9FGP202A SEPP Output Buffer (Single Ended Push Pull) SEPP Output Buffer (Single Ended Push Pull) The singled-ended outputs of the ICS9FGP202A default to either a drive strength of 2 loads or a drive strength of 1 ...

Page 5

Integrated Circuit Systems, Inc. Truth Table 1: VttPwr_GD/PD# and OE_96 VttPwr_GD/PD# OE_96 Pin 40 Pin *Assuming DOT96 Output Enable from SMBus Byte2 Bit0 sets to enable (default) Truth Table 2: VttPwr_GD/PD# ...

Page 6

Integrated Circuit Systems, Inc. Table2: DOT96 Spread and Frequency Selection Table DOT96 FS3 FS2 SS_EN Byte 0 Byte 3 Byte 3 bit 4 bit 3 bit ...

Page 7

Integrated Circuit Systems, Inc. Absolute Maximum Ratings PARAMETER SYMBOL 3.3V Supply Voltage VDDxxx Maximum difference across all VDDdelta VDD pins Storage Temperature Ts Ambient Operating Temp Tambient Junction Temperature Tj Input ESD protection HBM ESD prot 1 Guaranteed by design ...

Page 8

Integrated Circuit Systems, Inc. Electrical Characteristics - CPU 0.7V Current Mode Differential Pair PARAMETER SYMBOL Current Source Output Zo Impedance Voltage High VHigh Voltage Low VLow Max Voltage Vovs Min Voltage Vuds Crossing Voltage (abs) Vx(abs) Crossing Voltage (var) d-Vx ...

Page 9

Integrated Circuit Systems, Inc. Electrical Characteristics - DOT96SS 0.7V Current Mode Differential Pair PARAMETER SYMBOL Current Source Output Impedance Zo Voltage High VHigh Voltage Low VLow Max Voltage Vovs Min Voltage Vuds Crossing Voltage (abs) Vx(abs) Crossing Voltage (var) d-Vcross ...

Page 10

Integrated Circuit Systems, Inc. Electrical Characteristics - 33.33MHz PARAMETER SYMBOL Long Accuracy ppm Clock period Tperiod Absolute min/max period Tabs Output High Voltage V OH Output Low Voltage V OL Output High Current I OH Output Low Current I OL ...

Page 11

Integrated Circuit Systems, Inc. Electrical Characteristics - REF - 25MHz PARAMETER SYMBOL Long Accuracy ppm Clock period T period Output High Voltage V OH Output Low Voltage V OL Output High Current I OH Output Low Current I OL Rise ...

Page 12

Integrated Circuit Systems, Inc. General SMBus serial interface information for the ICS9FGP202A How to Write: • Controller (host) sends a start bit. • Controller (host) sends the write address *D0 • ICS clock will acknowledge • Controller (host) sends the ...

Page 13

Integrated Circuit Systems, Inc. SMBus Table: CPU Frequency Select and Spread Spectrum Control Register Byte 0 Pin # Name Bit 7 - Reserved Bit 6 - Reserved - Reserved Bit 5 - DOT96 SS_EN Bit 4 Bit 3 - CPU ...

Page 14

Integrated Circuit Systems, Inc. SMBus Table: 32.768KHz, 25Mhz and 33.33MHz Strength Control Register Byte 5 Pin # Name Bit 7 - Reserved Bit 6 - Reserved Bit 5 22 33.33MHz Str Bit 4 17 25MHz_1 Str 16 25MHz_0 Str Bit ...

Page 15

Integrated Circuit Systems, Inc. SMBus Table: CPU PLL VCO Frequency Control Register Byte 11 Pin # Name Bit Div8 Bit Div Div5 Bit Div4 Bit 4 Bit 3 ...

Page 16

Integrated Circuit Systems, Inc. SMBus Table: DOT PLL Spread Spectrum Control Register Byte 17 Pin # Name Bit 7 - SSP7 Bit 6 - SSP6 - SSP5 Bit 5 - SSP4 Bit 4 Bit 3 - SSP3 Bit 2 - ...

Page 17

Integrated Circuit Systems, Inc. Index Area Top View D DIMENSIONS SYMBOL MIN. MAX 0.05 A3 0.25 Reference b 0 0.50 BASIC Ordering Information Part / Order Number Shipping Packaging 9FGP202AKLF ...

Page 18

Integrated Circuit Systems, Inc. Revision History Rev. Issue Date Description 0.1 07/31/06 Initial Release 0.2 12/20/06 Changed power up stabilization time from 1.8 to 2.5 ms. Updated IDD specs. 1. IDD3.3OP 150mA to 200mA 2. IDD3.3PD driven from 50mA to ...

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