ICS951901AFT IDT, Integrated Device Technology Inc, ICS951901AFT Datasheet
ICS951901AFT
Specifications of ICS951901AFT
Related parts for ICS951901AFT
ICS951901AFT Summary of contents
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Integrated Circuit Systems, Inc. Programmable Frequency Generator & Integrated Buffers for Pentium III Processor Recommended Application: Single chip clock solution for IA platform. Output Features: • CPU @ 2.5V • SDRAM @ 3.3V • ...
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ICS951901 General Description The ICS951901 is a single chip clock solution for desktop designs using 630S chipsets. It provides all necessary clock signals for such a system. The ICS951901 belongs to ICS new generation of programmable system clock generators. It ...
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Serial Configuration Command Bitmap Byte0: Functionality and Frequency Select Register (default = 0) FS3 FS2 Bit7 Bit6 Bit2 Bit ...
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ICS951901 Byte 1: CPU, Active/Inactive Register (1= enable disable ...
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Byte 6: Control , Active/Inactive Register (1= enable disable ...
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ICS951901 Byte 11: VCO Frequency Control Register ...
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Byte 17: Output Rise/Fall Time Select Register ...
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ICS951901 Absolute Maximum Ratings Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V Logic Inputs . . . . . ...
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Electrical Characteristics - CPU 70° 2.5 V +/-5%; VDDL = 2.5 V +/-5 DDL PARAMETER SYMBOL 1 R Output Impedance DSP2B 1 R Output Impedance DSN2B Output High Voltage V OH2B Output ...
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ICS951901 Electrical Characteristics - PCI 70° 3.3 V +/-5%; VDDL = 2.5 V +/-5 PARAMETER SYMBOL 1 Output Impedance R DSP1B 1 Output Impedance R DSN1B Output High Voltage V OH1 ...
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Electrical Characteristics - AGP 70°C; V =3.3V +/-5 PARAMETER SYMBOL Output Impedance R DSP4B Output Impedance R DSN4B Output High Voltage V OH4B Output Low Voltage V OL4B Output High Current I OH4B ...
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ICS951901 2 General I C serial interface information for the ICS951901 How to Write: • Controller (host) sends a start bit. • Controller (host) sends the write address D2 • ICS clock will acknowledge • Controller (host) sends a dummy ...
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Brief I Programmable System Frequency Generator Register Name Functionality & Frequency Select Register Output Control Registers Vendor ID & Revision ID Registers Byte Count Read Back Register Watchdog Timer Count Register Watchdog Control Registers VCO Control Selection Bit VCO ...
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ICS951901 Shared Pin Operation - Input/Output Pins The I/O pins designated by (input/output) on the ICS951901 serve as dual signal functions to the device. During initial power-up, they act as input pins. The logic level (voltage) that is present on ...
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CPU_STOP# Timing Diagram CPU_STOP asychronous input to the clock synthesizer used to turn off the CPU clocks for low power operation. CPU_STOP# is synchronized by the ICS94209. The minimum that the CPU clock is enabled (CPU_STOP# ...
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ICS951901 PCI_STOP# Timing Diagram PCI_STOP asynchronous input to the ICS94209 used to turn off the PCICLK clocks for low power operation. PCI_STOP# is synchronized by the ICS94209 internally. The minimum that the PCICLK clocks are enabled ...
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SDRAM_STOP# Timing Diagram SDRAM_STOP asychronous input to the clock synthesizer used to stop SDRAM clocks for low power operation. SDRAM_STOP# is synchronized to complete it's current cycle, by the ICS94209. All other clocks will continue to ...
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ICS951901 PD# Timing Diagram The power down selection is used to put the part into a very low power state without turning off the power to the part. PD asynchronous active low input. This signal needs to be ...
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INDEX INDEX AREA AREA 45° 45° .10 (.004) C .10 (.004) C 300 mil SSOP Package Ordering Information ICS951901yFLF-T Example: ICS XXXXXX y F ...