ICS93776AFT IDT, Integrated Device Technology Inc, ICS93776AFT Datasheet - Page 4

no-image

ICS93776AFT

Manufacturer Part Number
ICS93776AFT
Description
IC DDR PLL ZD BUFFER 28-SSOP
Manufacturer
IDT, Integrated Device Technology Inc
Type
Zero Delay Bufferr
Datasheet

Specifications of ICS93776AFT

Input
Clock
Output
Clock
Frequency - Max
340MHz
Voltage - Supply
2.3 V ~ 2.7 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
28-SSOP
Frequency-max
340MHz
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
93776AFT
ICS93776
0793A—03/08/05
Timing Requirements
T
Operating Clock Frequency
Input Clock Duty Cycle
Clock Stabilization
1. Guaranteed by design, not 100% tested in production.
Switching Characteristics
T
Output Differential Pair
Crossing Voltage
1. Guaranteed by design, not 100% tested in production.
2. Refers to transistion on non-inverting period.
3. While the pulse skew is almost constant over frequency, the duty cycle error increases at higher frequencies.
Duty Cycle (Sign Ended)
A
A
Output to output Skew
This is due to the formular: duty_cycle=t
= 0 - 70°C; Supply Voltage AV
= 0 - 70°C; Supply Voltage AV
Cycle to cycle Jitter
Rise Time, Fall Time
PARAMETER
Phase Error
PARAMETER
1
1
1
1,2
4
1
1,3
1
SYMBOL
SYMBOL
T
t
DD
V
DC
R
DD
t
t
skew
c-c
pe
freq
OC
, V
, t
t
STAB
, V
d
f
tin
DD
op
DD
= 2.50V (unless otherwise stated)
= 2.50V ± 0.20V (unless otherwise stated)
wH
Input Voltage level: 0-2.50V
from VDD = 2.5V to 1% target frequency
/t
C
, where the cycle time (t
66 MHz to 266 MHz
66 MHz to 267 MHz
Load=120Ω/14pF
CONDITIONS
CONDITIONS
V
4
DD
=2.50V
C
)decreases as the frequency increases.
-150
1.23
MIN
MIN
48
22
40
TYP
TYP
50
MAX
1.32
MAX
100
150
100
950
340
100
52
60
UNITS
UNITS
MHz
ps
ps
ps
ps
µs
%
%
V

Related parts for ICS93776AFT