ICS9DB403DFLF IDT, Integrated Device Technology Inc, ICS9DB403DFLF Datasheet - Page 12

• Manufacturer Part Number: ICS9DB403DFLF
• Description: IC BUFFER 4OUTPUT DIFF 28-SSOP
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Clock Bufferr
• Series: -r

Specifications of ICS9DB403DFLF

• Input: HCSL
• Output: HCSL, LVDS
• Frequency - Max: 400MHz
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 28-SSOP
• Frequency-max: 400MHz
• Number Of Elements: 1
• Supply Current: 200mA
• Pll Input Freq (min): 50MHz
• Pll Input Freq (max): 110MHz
• Operating Supply Voltage (typ): 3.3V
• Operating Temp Range: 0C to 70C
• Package Type: SSOP
• Output Frequency Range: 50 to 100MHz
• Operating Supply Voltage (min): 3.135V
• Operating Supply Voltage (max): 3.465V
• Operating Temperature Classification: Commercial
• Pin Count: 28
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Compliant, Lead free / RoHS Compliant
• Other names: 9DB403DFLF

IDT
SMBus Table: Frequency Select Register, READ/WRITE ADDRESS (DC/DD)
SMBus Table: Output Control Register
NOTE: The SMBus Output Enable Bit must be '1' AND the respective OE pin must be active for the output to run!
SMBus Table: OE Pin Control Register
SMBus Table: Reserved Register
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
ICS9DB403D
Four Output Differential Buffer for PCIe for Gen 1 and Gen 2
TM
Byte 0
Byte 1
Byte 2
Byte 3
/ICS
TM
Four Output Differential Buffer for PCIe Gen 1 and Gen 2
22,23
19,20
22,23
9,10
6,7
6,7
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Pin #
Pin #
Pin #
Pin #
STOP_Mode
PD_Polarity
SRC_DIV#
BYPASS#
PD_Mode
PLL_BW#
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Name
Name
DIF_6
DIF_5
DIF_2
DIF_1
Name
DIF_6
DIF_1
Name
DIF_6 Stoppable with OE6
DIF_1 Stoppable with OE1
SRC Divide by 2 Select
SRC_Stop# drive mode
Control Function
Select PD polarity
Control Function
Control Function
Control Function
PD# drive mode
Select PLL BW
BYPASS#/PLL
Output Enable
Output Enable
Output Enable
Output Enable
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
12
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Type
Type
Type
Type
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
High BW
Free-run
Free-run
Disable
Disable
Disable
Disable
fan-out
driven
driven
Low
x/2
0
0
0
0
ICS9DB403D
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Stoppable
Stoppable
Low BW
Enable
Enable
Enable
Enable
High
ZDB
Hi-Z
Hi-Z
1x
1
1
1
1
REV M 01/27/11
Default
Default
Default
Default
X
X
X
X
X
X
X
X
X
X
0
0
0
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0