ICS950405AFLF IDT, Integrated Device Technology Inc, ICS950405AFLF Datasheet
ICS950405AFLF
Specifications of ICS950405AFLF
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ICS950405AFLF Summary of contents
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Integrated Circuit Systems, Inc. AMD - K8™ System Clock Chip Recommended Application: AMD K8 System Clock with AMD, VIA or ALI Chipset Output Features: • Differential pair push-pull CPU clocks @ 3.3V • PCICLK (Including 1 ...
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ICS950405 Pin Descriptions PIN # PIN NAME TYPE 1 *FS0/REF0 2 VDDHTT PWR OUT 5 GND PWR 6 *ModeA/HTTCLK0 7 *ModeB/PCICLK8/HTTCLK1 PCICLK9/HTTCLK2 8 OUT 9 VDDPCI PWR 10 GND PWR 11 PCICLK11/HTTCLK3 12 PCICLK10 OUT PCICLK0 ...
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General Description The ICS950405 is a main system clock solution for desktop designs using the AMD K8 CPU. It provides all necessary clock signals for Clawhammer and Sledgehammer with AMD, VIA or ALI systems. The ICS950405 is part of a ...
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ICS950405 Power Groups Pin Number VDD GND 16,19 15,20 29 27,30,33 35,38 34, Analog, CPU PLL, MCLK 46 47 Mode Functionality Tables ModeA ModeB Pin7 0 0 HTTCLK1 0 1 HTTCLK1 1 0 PCICLK8 ...
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General I How to Write: • Controller (host) sends a start bit. • Controller (host) sends the write address D2 • ICS clock will acknowledge • Controller (host) sends the begining byte location = N • ICS clock will acknowledge ...
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ICS950405 Table: Frequency Select Register Byte 0 Pin # Name - SS_EN Bit 7 - SEL24_48MHz Bit 6 - Reserved Bit 5 - Reserved Bit 4 - Bit 3 - Bit 2 - Bit 1 - Bit ...
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I C Table: Output Control Register Byte 4 Pin # - Bit 7 - Bit 6 - Bit 5 - Bit 4 - Bit 3 - Bit 2 - Bit 1 - Bit Table: Reserved ...
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ICS950405 Table: Skew Control Register Byte 8 Pin # Name - PCI/HTTSkw3 Bit 7 - PCI/HTTSkw2 Bit 6 - PCI/HTTSkw1 Bit 5 - PCI/HTTSkw0 Bit 4 - PCISkw3 Bit 3 - PCISkw2 Bit 2 - PCISkw1 Bit ...
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I C Table: VCO Frequency Control Register Byte 12 Pin # Name - N Div7 Bit Div6 Bit Div5 Bit Div4 Bit Div3 Bit ...
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ICS950405 Absolute Maximum Ratings Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . 3.8V Logic Inputs . . . . . . ...
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Electrical Characteristics - K8 Push Pull Differential Pair 70° 3.3 V +/-5 PARAMETER SYMBOL δV/δt Rising Edge Rate δV/δt Falling Edge Rate V Differential Voltage DIFF Change in V ∆V DIFF_DC ...
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ICS950405 Electrical Characteristics - PCICLK 70° 3.3 V,+/-5 PARAMETER SYMBOL Output High Voltage V OH1 Output Low Voltage V OL1 Output High Current I OH1 Output Low Current I OL1 1 ...
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Electrical Characteristics - AGPCLK 70°C; VDD=3.3V +/-5 PARAMETER SYMBOL Output Frequency Output Impedance R DSP1 1 Output High Voltage Output Low Voltage Output High Current ...
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ICS950405 Shared Pin Operation - Input/Output Pins The I/O pins designated by (input/output) on the ICS950405 serve as dual signal functions to the device. During initial power-up, they act as input pins. The logic level (voltage) that is present on ...
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INDEX INDEX AREA AREA 45° 45° SEATING SEATING b PLANE PLANE .10 (.004) C .10 (.004) C 300 mil SSOP Package Ordering Information ICS950405yFLF-T Example: ...
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ICS950405 Revision History Rev. Issue Date Description 0.1 4/21/2005 Updated Byte 11/12 M/N programming description 0802F—04/22/05 16 Page # 8-9 ...