ICS98UAE877AHLF IDT, Integrated Device Technology Inc, ICS98UAE877AHLF Datasheet - Page 8

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ICS98UAE877AHLF

Manufacturer Part Number
ICS98UAE877AHLF
Description
IC CLOCK DRIVER 1.8V LP 52-BGA
Manufacturer
IDT, Integrated Device Technology Inc
Type
Clock Driverr
Datasheet

Specifications of ICS98UAE877AHLF

Input
Clock
Output
Clock
Frequency - Max
410MHz
Voltage - Supply
1.425 V ~ 1.575 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
52-BGA
Frequency-max
410MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
98UAE877AHLF

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ICS98UAE877AHLF
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
Part Number:
ICS98UAE877AHLFT
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
1.5V LOW-POWER WIDE-RANGE FREQUENCY CLOCK DRIVER
ICS98UAE877A
1.5V LOW-POWER WIDE-RANGE FREQUENCY CLOCK DRIVER
Timing Requirements Over Recommended Operating Free-Air Temperature
Range
Following Conditions Apply Unless Otherwise Specified:
Commercial: T
Symbol
freq
1
2
not required to meet the other timing parameters. (Used for low speed system debug.)
3
4
signal to its reference signal, within the value specificied by the Static Phase Offset (t∅), after power-up.
During normal operation, the stabilization time is also the time required for the integrated PLL circuit to ob-
tain phase lock of its feedback signal to its reference signal when CLK and CLK go to a logic low state,
enter the power-down mode and later return to active operation. CLK and CLK may be left floating after
they have been driven low for one complete clock cycle.
freq
T
d
STAB
TIN
APP
The PLL must be able to handle spread spectrum induced skew.
Operating clock frequency indicates a range over which the PLL must be able to lock, but in which it is
Application clock frequency indicates a range over which the PLL must meet all timing parameters.
Stabilization time is the time required for the integrated PLL circuit to obtain phase lock of its feedback
OP
A
= 0°C to +70°C, Industrial: T
Parameter
Max Clock Frequency
Application Frequency Range
Input Clock Duty Cycle
CLK Stabilization
1
4
2
A
3
= -40°C to +85°C; Supply Voltage AV
1.5V ± 0.075V @ 25° C
1.5V ± 0.075V @ 25° C
8
Conditions
COMMERCIAL TEMPERATURE GRADE
DD
Min.
160
95
40
ICS98UAE877A
/V
DDQ
= 1.5V ± 0.075V.
Max.
410
410
60
9
Units
MHz
MHz
µs
%
7181/3

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