MPC96877VK IDT, Integrated Device Technology Inc, MPC96877VK Datasheet

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MPC96877VK

Manufacturer Part Number
MPC96877VK
Description
IC CLK DRIVER 1:10 SDRAM 52-BGA
Manufacturer
IDT, Integrated Device Technology Inc
Type
PLL Clock Driverr
Datasheet

Specifications of MPC96877VK

Input
Clock
Output
SSTL-18
Frequency - Max
340MHz
Voltage - Supply
1.7 V ~ 1.9 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
52-BGA
Frequency-max
340MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MPC96877VK
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
IDT™ 1.8 V PLL 1:10 Differential SDRAM Clock Driver
Freescale Timing Solutions Organization has been acquired by Integrated Device Technology, Inc
1.8 V PLL 1:10 Differential SDRAM
Clock Driver
Freescale Semiconductor, Inc.
TECHNICAL DATA
Product Preview
1.8 V PLL 1:10 Differential SDRAM
Recommended Applications
Features
Switching Characteristics
Functional Description
that distributes a differential clock input pair (CK, CK) to ten differential pairs of
clock outputs (Yn, Yn) and to one differential pair of feedback clock outputs
(FBOUT, FBOUT). The clock outputs are controlled by the input clocks (CK,
CK), the feedback clocks (FBIN, FBIN), the LVCMOS control pins (OE, OS),
and the analog power input (AV
FBOUT/FBOUT, are disabled while the internal PLL continues to maintain its locked-in frequency. OS (output select) is a program pin
that must be tied to GND or V
no affect on Y7/Y7, they are free running. When AV
clock inputs (CK, CK) are logic low, the device enters in a low power mode. An input logic detection circuit on the differential inputs,
independent from input buffers, detects the logic low level and performs in a low power state where all outputs, the feedback, and the
PLL are off. When the clock inputs transition from being logic low to being differential signals, the PLL turns back on, the inputs and
the outputs are enabled, and the PLL obtains phase lock between the feedback clock pair (FBIN, FBIN) and the clock input pair (CK,
CK) within the specified stabilization time.
FREESCALE SEMICONDUCTOR ADVANCED CLOCK DRIVERS DEVICE DATA
The MPC96877 is a high-performance, low-jitter, low-skew, zero-delay buffer
The MPC96877 is able to track spread spectrum clocking (SSC) for reduced EMI. This device operates from 0°C to 70°C.
DDR II Memory Modules
Zero Delay Board fan-out
1.8 V Phase Lock Loop Clock Driver for (DDR II) Applications
Spread Spectrum Clock Compatible
Operating Frequency: 100 MHz to 340 MHz
1 to 10 differential clock distribution (SSTL_18)
52-Ball VF-BGA (FP-MAPBGA 0.65-mm pitch) and 40-Pin MLF (QFN)
52-lead Pb-free Package Available
External Feedback Pins (FBIN, FBIN) are used to synchronize the Outputs
to the Input Clocks
Single-Ended Input and Single-Ended Output Modes
Meets or Exceeds JESD82-8 PLL Standard for PC2-3200/4300
Auto Power Down detect logic
Cycle-to-Cycle Jitter (>165 Mhz): 40 ps max.
Output-to-Output Skew: 40 ps max.
DD
DD
. When OS is high, OE functions as previously described. When OS and OE are both low, OE has
). When OE is low, the clock outputs, except
DD
is grounded, the PLL is turned off and bypassed for test purposes. When both
1
0
°
C to 70
T
AVAILABLE ORDERING OPTIONS
CLOCK / ZERO DELAY BUFFER
A
52-BALL FP-MAPBGA PACKAGE
°
40-PIN MLF/QFN PACKAGE
C
MPC96877
DDR II MEMORY
MPC96877VK
CASE 1544-01
CASE 1545-01
52-Ball BGA
VK SUFFIX
EP SUFFIX
(Pb-Free)
Order number: MPC96877
DATA SHEET
MPC96877
MPC96877EP
40-Pin QFN
Rev 1, 08/2004
(Pb-Free)
MPC96877
547

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MPC96877VK Summary of contents

Page 1

... PLL is turned off and bypassed for test purposes. When both DD 1 Order number: MPC96877 DATA SHEET Rev 1, 08/2004 MPC96877 MPC96877 DDR II MEMORY VK SUFFIX CASE 1544-01 EP SUFFIX 40-PIN MLF/QFN PACKAGE CASE 1545-01 52-Ball BGA 40-Pin QFN ° MPC96877VK MPC96877EP C (Pb-Free) (Pb-Free) 547 MPC96877 ...

Page 2

MPC96877 1.8 V PLL 1:10 Differential SDRAM Clock Driver MPC96877 K–100 KΩ GND FBIN FBIN * The Logic Detect (LD) powers down the device when a logic low is applied to both CK ...

Page 3

MPC96877 1.8 V PLL 1:10 Differential SDRAM Clock Driver VF-MAPBGA (VK) PACKAGE GND GND DDQ V DDQ DDQ DDQ G ...

Page 4

MPC96877 1.8 V PLL 1:10 Differential SDRAM Clock Driver MPC96877 Table 1. Pin Configuration Pin BGA AGND FBIN F6 FBIN FBOUT H6 FBOUT GND B2, B3, B4, ...

Page 5

MPC96877 1.8 V PLL 1:10 Differential SDRAM Clock Driver Table 3. Absolute Maximum Ratings Over Free-Air Operating Range Supply voltage range DDQ Input voltage range Output voltage range ...

Page 6

MPC96877 1.8 V PLL 1:10 Differential SDRAM Clock Driver MPC96877 Table 5. Electrical Characteristics Over Recommended Free-Air Operating Temperature Range Description Parameter All inputs High output voltage Low output voltage Output disable current Output differential voltage Input leakage current Static ...

Page 7

MPC96877 1.8 V PLL 1:10 Differential SDRAM Clock Driver Table 7. Switching Characteristics over Recommended Free-Air Operating Temperature Range Unless Otherwise Noted (see Notes) Description OE to any Y any Y/Y Cycle-to-Cycle period jitter Static phase offset Dynamic ...

Page 8

MPC96877 1.8 V PLL 1:10 Differential SDRAM Clock Driver MPC96877 V DDQ CU877 GND V DDQ /2 CU877 -V DDQ /2 IDT™ 1.8 V PLL 1:10 Differential SDRAM Clock Driver 554 Freescale Timing Solutions Organization has been acquired by Integrated ...

Page 9

MPC96877 1.8 V PLL 1:10 Differential SDRAM Clock Driver TEST CIRCUIT AND SWITCHING WAVEFORMS (Continued) Yx, FBOUT Yx, FBOUT CK CK FBIN FBIN Yx, FBOUT Yx, FBOUT IDT™ 1.8 V PLL 1:10 Differential SDRAM Clock Driver FREESCALE SEMICONDUCTOR ADVANCED CLOCK ...

Page 10

MPC96877 1.8 V PLL 1:10 Differential SDRAM Clock Driver MPC96877 TEST CIRCUIT AND SWITCHING WAVEFORMS (Continued) Yx, FBOUT Yx, FBOUT Yx, FBOUT Yx, FBOUT Yx, FBOUT Yx, FBOUT t half period n Clock Inputs and Outputs, OE IDT™ 1.8 V ...

Page 11

MPC96877 1.8 V PLL 1:10 Differential SDRAM Clock Driver TEST CIRCUIT AND SWITCHING WAVEFORMS (Continued FBIN FBIN t (ø) dyn OE Y IDT™ 1.8 V PLL 1:10 Differential SDRAM Clock Driver FREESCALE SEMICONDUCTOR ADVANCED CLOCK ...

Page 12

MPC96877 1.8 V PLL 1:10 Differential SDRAM Clock Driver MPC96877 RECOMMENDED FILTERING FOR THE ANALOG POWER SUPPLY ( DDQ 1 ohm GND CARD VIA NOTES: IDT™ 1.8 V PLL 1:10 Differential SDRAM Clock Driver 558 Freescale Timing Solutions ...

Page 13

MPC96877 PART NUMBERS 1.8 V PLL 1:10 Differential SDRAM Clock Driver INSERT PRODUCT NAME AND DOCUMENT TITLE Innovate with IDT and accelerate your future networks. Contact: www.IDT.com For Sales 800-345-7015 408-284-8200 Fax: 408-284-2775 Corporate Headquarters Integrated Device Technology, Inc. 6024 ...

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