ICS8533AGI-01LFT IDT, Integrated Device Technology Inc, ICS8533AGI-01LFT Datasheet - Page 9

• Manufacturer Part Number: ICS8533AGI-01LFT
• Description: IC FANOUT BUFFER 1-4 20-TSSOP
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Fanout Buffer (Distribution), Multiplexerr
• Series: HiPerClockS™r

Specifications of ICS8533AGI-01LFT

• Number Of Circuits: 1
• Ratio - Input:output: 2:4
• Differential - Input:output: Yes/Yes
• Input: CML, HCSL, LVDS, LVHSTL, LVPECL, SSTL
• Output: LVPECL
• Frequency - Max: 650MHz
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 20-TSSOP
• Frequency-max: 650MHz
• Number Of Clock Inputs: 2
• Mode Of Operation: Differential
• Output Frequency: 650MHz
• Output Logic Level: LVPECL
• Operating Supply Voltage (min): 3.135V
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.465V
• Package Type: TSSOP
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 20
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 8533AGI-01LFT

F
D
The CLK /nCLK accepts LVDS, LVPECL, LVHSTL, SSTL, HCSL
and other differential signals. Both V
the V
interface examples for the HiPerClockS CLK/nCLK input driven
by the most common driver types. The input interfaces sug-
F
8533AGI-01
F
IGURE
IGURE
IGURE
IFFERENTIAL
3.3V
R5,R6 locate near the driver pin.
PP
3.3V
LVPECL
3C. H
and V
3A. H
3E. H
1.8V
LVPECL
R5
100 - 200
LVHSTL
ICS
HiPerClockS
LVHSTL Driver
3.3V LVPECL D
ICS H
CMR
3.3V LVPECL D
I
I
P
I
P
P
C
ER
input requirements. Figures 3A to 3E show
ER
ER
Zo = 50 Ohm
Zo = 50 Ohm
LOCK
R6
100 - 200
C
Zo = 50 Ohm
Zo = 50 Ohm
C
C
I
P
LOCK
LOCK
Zo = 50 Ohm
Zo = 50 Ohm
LOCK
ER
C
I
S CLK/
NPUT
LOCK
S CLK/
S CLK/
RIVER
S LVHSTL D
RIVER WITH
R1
50
3.3V
R3
125
C1
C2
I
R1
84
NTERFACE
N
N
N
CLK I
CLK I
CLK I
SWING
R2
50
3.3V
R3
125
R4
125
R1
84
R2
84
CLK
nCLK
and V
R4
125
NPUT
NPUT
AC C
NPUT
R2
84
CLK
nCLK
3.3V
3.3V
RIVER
HiPerClockS
Input
OH
D
D
HiPerClockS
Input
D
OUPLE
CLK
nCLK
RIVEN BY
RIVEN BY
RIVEN BY
must meet
3.3V
HiPerClockS
Input
D
IFFERENTIAL
9
gested here are examples only. Please consult with the vendor
of the driver component to confirm the driver termination re-
quirements. For example in Figure 3A, the input termination
applies for ICS HiPerClockS LVHSTL drivers. If you are using
an LVHSTL driver from another vendor, use their termination
recommendation.
F
F
IGURE
IGURE
3.3V
3.3V
3D. H
3B. H
LVDS_Driv er
LVPECL
-
TO
3.3V LVDS D
3.3V LVPECL D
-3.3V LVPECL F
I
I
P
P
Zo = 50 Ohm
Zo = 50 Ohm
ER
ER
C
C
LOCK
LOCK
Zo = 50 Ohm
Zo = 50 Ohm
S CLK/
S CLK/
RIVER
R1
50
RIVER
R3
50
ICS8533I-01
L
N
N
R2
50
CLK I
CLK I
OW
R1
100
CLK
nCLK
ANOUT
3.3V
S
REV. A DECEMBER 6, 2007
NPUT
NPUT
HiPerClockS
KEW
Input
CLK
nCLK
D
D
3.3V
RIVEN BY
, 1-
RIVEN BY
B
Receiv er
UFFER
TO
-4