ICS853031AYLF IDT, Integrated Device Technology Inc, ICS853031AYLF Datasheet - Page 15

• Manufacturer Part Number: ICS853031AYLF
• Description: IC FANOUT BUFF LVPECL/ECL 32LQFP
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: HiPerClockS™r
• Type: Fanout Buffer (Distribution), Multiplexerr

Specifications of ICS853031AYLF

• Number Of Circuits: 1
• Ratio - Input:output: 2:9
• Differential - Input:output: Yes/Yes
• Input: CML, HCSL, LVDS, LVHSTL, LVPECL, SSTL
• Output: ECL, LVPECL
• Frequency - Max: 1.6GHz
• Voltage - Supply: 2.375 V ~ 3.465 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 32-LQFP
• Frequency-max: 1.6GHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 800-1162; 853031AYLF

This section provides information on power dissipation and junction temperature for the ICS853031.
Equations and example calculations are also provided.
1. Power Dissipation.
The total power dissipation for the ICS853031 is the sum of the core power plus the power dissipated in the load(s).
The following is the power dissipation for V
NOTE: Please refer to Section 3 for details on calculating power dissipated in the load.
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of the
device. The maximum recommended junction temperature for HiPerClockS
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance
moderate air flow of 200 linear feet per minute and a multi-layer board, the appropriate value is 42.1°C/W per Table 6 below.
Therefore, Tj for an ambient temperature of 85°C with all outputs switching is:
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow,
and the type of board (single layer or multi-layer).
T
IDT
ABLE
ICS853031
LOW SKEW, 1-TO-9, DIFFERENTIAL-TO-2.5, 3.3V LVPECL/ECL FANOUT BUFFER
™
/ ICS
Single-Layer PCB, JEDEC Standard Test Boards
Multi-Layer PCB, JEDEC Standard Test Boards
NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs.
6. T
Power (core)
Power (outputs)
If all outputs are loaded, the total power is 9 * 30.94mW = 278.5mW
Total Power
The equation for Tj is as follows: Tj =
Tj = Junction Temperature
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
T
85°C + 0.545W * 42.1°C/W = 108°C. This is well below the limit of 125°C.
™
JA
A
1-TO-9, 2.5V, 3.3V LVPECL/ECL FANOUT BUFFER
= Ambient Temperature
HERMAL
= junction-to-Ambient Thermal Resistance
R
MAX
ESISTANCE
_MAX
= V
MAX
(3.465V, with all outputs switching) = 266.8mW + 278.5mW = 545.3mW
= 30.2mW/Loaded Output pair
CC_MAX
* I
JA
EE_MAX
FOR
JA
= 3.465V * 77mA = 266.8mW
32-
by Velocity (Linear Feet per Minute)
CC
PIN
= 3.3V ± 5% = 3.465V, which gives worst case results.
P
LQFP F
OWER
JA
* Pd_total + T
ORCED
C
ONSIDERATIONS
C
A
67.8°C/W
47.9°C/W
ONVECTION
15
0
TM
devices is 125°C.
55.9°C/W
42.1°C/W
200
ICS853031AY REV. C AUGUST 12, 2008
JA
50.1°C/W
39.4°C/W
must be used. Assuming a
500