ICS85354AKLFT IDT, Integrated Device Technology Inc, ICS85354AKLFT Datasheet - Page 8

• Manufacturer Part Number: ICS85354AKLFT
• Description: IC MUX DUAL 2:1 1:2 16-VFQFPN
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: HiPerClockS™r
• Type: Multiplexerr

Specifications of ICS85354AKLFT

• Number Of Circuits: 2
• Ratio - Input:output: 2:1, 1:2
• Differential - Input:output: Yes/Yes
• Input: CML, LVDS, LVPECL
• Output: LVPECL
• Frequency - Max: 3.2GHz
• Voltage - Supply: 2.375 V ~ 3.465 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 16-VFQFN
• Frequency-max: 3.2GHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 85354AKLFT

Differential Clock Input Interface
The CLK /CLK accepts LVDS, LVPECL, LVHSTL, SSTL, HCSL and
other differential signals. Both V
and V
examples for the HiPerClockS CLK/CLK input driven by the most
common driver types. The input interfaces suggested here are
examples only. Please consult with the vendor of the driver
Figure 2A. HiPerClockS CLK/CLK Input
Figure 2C. HiPerClockS CLK/CLK Input
Figure 2E. HiPerClockS CLK/CLK Input
IDT™ / ICS™ LVPECL/ECL MULTIPLEXER
ICS85354
DUAL 2:1 AND 1:2, DIFFERENTIAL-TO-LVPECL/ECL MULTIPLEXER
CMR
2.5V
1.8V
3.3V
HCSL
LVPECL
*Optional – R3 and R4 can be 0Ω
input requirements. Figures 2A to 2F show interface
LVHSTL
IDT
HiPerClockS
LVHSTL Driver
Driven by an IDT Open Emitter
HiPerClockS LVHSTL Driver
Driven by a 3.3V LVPECL Driver
Driven by a 3.3V HCSL Driver
*R3
*R4
Zo = 50Ω
Zo = 50Ω
Zo = 50Ω
Zo = 50Ω
33
33
Zo = 50Ω
Zo = 50Ω
SWING
R3
125
R1
50
3.3V
R1
84
R1
50
and V
R4
125
R2
50
R2
84
OH
R2
50
must meet the V
CLK
nCLK
CLK
nCLK
CLK
nCLK
3.3V
3.3V
3.3V
HiPerClockS
Input
HiPerClockS
Input
HiPerClockS
Input
PP
8
component to confirm the driver termination requirements. For
example, in Figure 2A, the input termination applies for IDT
HiPerClockS open emitter LVHSTL drivers. If you are using an
LVHSTL driver from another vendor, use their termination
recommendation.
Figure 2B. HiPerClockS CLK/CLK Input
Figure 2D. HiPerClockS CLK/CLK Input
Figure 2F. HiPerClockS CLK/CLK Input
2.5V
3.3V
3.3V
SSTL
LVDS
LVPECL
Driven by a 3.3V LVPECL Driver
Driven by a 3.3V LVDS Driver
Driven by a 2.5V SSTL Driver
Zo = 60Ω
Zo = 60Ω
Zo = 50Ω
Zo = 50Ω
ICS85354AK REV. C NOVEMBER 04, 2008
Zo = 50Ω
Zo = 50Ω
R3
120
2.5V
R1
120
R1
50
R2
50
R4
120
R2
120
R2
50
R1
100
CLK
nCLK
CLK
nCLK
CLK
nCLK
3.3V
3.3V
HiPerClockS
3.3V
HiPerClockS
Input
Receiver