74HCT9046AD,112 NXP Semiconductors, 74HCT9046AD,112 Datasheet - Page 33

• Manufacturer Part Number: 74HCT9046AD,112
• Description: IC PLL BAND GAP CNTRL VCO 16SOIC
• Manufacturer: NXP Semiconductors
• Type: Phase Lock Loop (PLL)r
• Series: 74HCTr

Specifications of 74HCT9046AD,112

• Number Of Circuits: 1
• Package / Case: 16-SOIC (3.9mm Width)
• Pll: Yes
• Input: Clock
• Output: Clock
• Ratio - Input:output: 2:2
• Differential - Input:output: No/No
• Frequency - Max: 16MHz
• Divider/multiplier: No/No
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Frequency-max: 16MHz
• Maximum Input Frequency: 16 MHz
• Minimum Input Frequency: 11 MHz
• Output Frequency Range: 2 MHz to 3 MHz
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 4.5 V
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 568-3978-5; 74HCT9046AD; 74HCT9046AD; 935044180112

NXP Semiconductors
74HCT9046A_6
Product data sheet
13.2 PLL design example
The frequency synthesizer used in the design example shown in
following parameters:
The open loop gain is:
and the closed loop:
where:
The programmable counter ratio K
The VCO is set by the values of R1, R2 and C1; R2 = 10 k (adjustable).
The values can be determined using the information in
With f
The VCO gain is:
The gain of the phase comparator PC2 is:
H (s) G(s)
------ -
N
N
K
v
Output frequency: 2 MHz to 3 MHz
Frequency steps: 100 kHz
Settling time: 1 ms
Overshoot: < 20 %
u
K
K
K
K
min
max
R1 = 30 k
R2 = 30 k
C1 = 100 pF
i
p
f
o
n
=
=
= low-pass filter transfer gain
= phase comparator gain
= K
=
0
=
=
----------------------------------------- -
------------------------------------------------------- -
1
1
V
= 2.5 MHz and f
+
K
n
------------ -
v
f
------------ -
CC
f
f
f
/s VCO gain
OUT
step
divider ratio
OUT
p
K
2 f
step
=
–
p
L
K
1.1
K
=
=
K
f
p
2
f
--------------------
100 kHz
-------------------- -
100 kHz
2 MHz
–
3 MHz
K
K
1.1
o
K
Rev. 06 — 15 September 2009
f
o
K
L
=
K
= 500 kHz this gives the following values (V
n
K
o
1 MHz
---------------- -
=
=
n
2.8
20
K
30
n
n
2
can be found as follows:
2.24 10
6
r s V
PLL with band gap controlled VCO
Table
8.
74HCT9046A
Figure 34
CC
© NXP B.V. 2009. All rights reserved.
= 5.0 V):
has the
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