74HCT9046AN,112 NXP Semiconductors, 74HCT9046AN,112 Datasheet
74HCT9046AN,112
Specifications of 74HCT9046AN,112
935044170112
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74HCT9046AN,112 Summary of contents
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PLL with band gap controlled VCO Rev. 06 — 15 September 2009 1. General description The 74HCT9046A is a high-speed Si-gate CMOS device specified in compliance with JEDEC standard no 7A. 2. Features I Operation power supply ...
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... NXP Semiconductors 3. Applications I FM modulation and demodulation where a small center frequency tolerance is essential I Frequency synthesis and multiplication where a low jitter is required (e.g. video picture-in-picture) I Frequency discrimination I Tone decoding I Data synchronization and conditioning I Voltage-to-frequency conversion I Motor-speed control 4. Ordering information Table 1. Ordering information ...
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... NXP Semiconductors 5. Block diagram C1 C1A INH Fig 1. Block diagram 6. Functional diagram 3 COMP_IN 14 SIG_IN 15 RB C1A 6 7 C1B R1 11 VCO 12 R2 VCO_IN 9 5 INH Fig 2. Logic symbol 74HCT9046A_6 Product data sheet f out f in VCO_OUT C1B COMP_IN SIG_IN COMPARATOR VCO COMPARATOR DEM_OUT VCO_IN ...
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C1A C1B VCO_OUT V ref2 12 R2 VCO R2 V ref1 DEM_OUT VCO_IN 9 Fig 4. Logic diagram f f out COMP_IN SIG_IN PC1 PCP logic up ...
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... NXP Semiconductors 7. Pinning information 7.1 Pinning Fig 5. Pin configuration 7.2 Pin description Table 2. Pin description Symbol Pin GND 1 PC1_OUT/PCP_OUT 2 COMP_IN 3 VCO_OUT 4 INH 5 C1A 6 C1B 7 GND 8 VCO_IN 9 DEM_OUT PC2_OUT 13 SIG_IN 74HCT9046A_6 Product data sheet 74HCT9046A 1 16 GND V CC PC1_OUT PCP_OUT COMP_IN ...
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... NXP Semiconductors 8. Functional description The 74HCT9046A is a phase-locked-loop circuit that comprises a linear VCO and two different phase comparators (PC1 and PC2) with a common signal input amplifier and a common comparator input, see voltage signals (CMOS level), or indirectly coupled (with a series capacitor) to small voltage signals. A self-bias input circuit keeps small voltage signals within the linear region of the input amplifi ...
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... NXP Semiconductors • The inhibit function differs. For the 74HCT4046A a HIGH-level at the inhibit input (pin INH) disables the VCO and demodulator, while a LOW-level turns both on. For the 74HCT9046A a HIGH-level on the inhibit input disables the whole circuit to minimize standby power consumption. 8.2 VCO ...
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... NXP Semiconductors waveforms for the PC1 loop locked at f actual waveforms across the VCO capacitor at pins C1A and C1B (V show the relation between these ramps and the VCO_OUT voltage. The frequency capture range (2f which the PLL will lock if it was initially out-of-lock. The frequency lock range (2f defi ...
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... NXP Semiconductors Fig 7. 8.3.2 Phase Comparator 2 (PC2) This is a positive edge-triggered phase and frequency detector. When the PLL is using this comparator, the loop is controlled by positive signal transitions and the duty cycles of SIG_IN and COMP_IN are not important. PC2 comprises two D-type flip-flops, control gating and a 3-state output stage with sink and source transistors acting as current sources, henceforth called charge pump output of PC2 ...
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... NXP Semiconductors down = PC_IN pulse overlap of approximately every , even at zero closed simultaneously for a short period (typically 15 ns). Fig 8. The current switch charge pump output of PC2 + Current transfer I cp pump current --------- - PC_IN 2 Fig 9. Phase comparator 2 current and voltage transfer characteristics When the frequencies of SIG_IN and COMP_IN are equal but the phase of SIG_IN leads that of COMP_IN, the up output driver at PC2_OUT is held ‘ ...
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... NXP Semiconductors When the frequency of SIG_IN is higher than that of COMP_IN, the source output driver is held ‘ON’ for most of the input signal cycle time and for the remainder of the cycle time both drivers are ‘OFF’ (3-state). If the SIG_IN frequency is lower than the COMP_IN frequency, then it is the sink driver that is held ‘ ...
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... NXP Semiconductors 2.75 VCO_IN 2.50 (1) (2) 2.25 25 (1) Due to parasitic capacitance on PC2_OUT. (2) Backlash time (dead zone). a. Response with traditional voltage-switch charge-pump PC2_OUT (74HCT4046A). Fig 11. The response of a locked-loop in the vicinity of the zero crossing of the phase error The design of the low-pass filter is somewhat different when using current sources. The external resistor longer present when using PC2 as phase comparator ...
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... NXP Semiconductors Using this equivalent resistance R3' for the filter design the voltage can now be expressed as a transfer function of PC2; assuming ripple ( PC2 Again this illustrates the supply voltage independent behavior of PC2. 8.4 Loop filter component selection Examples of PC2 combined with a passive filter are shown in shows that PC2 with only a C2 fi ...
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... NXP Semiconductors INPUT OUTPUT R bias C2 001aak446 a. Simple loop filter for PC2 with damping R bias = ----------- - C2 = R3‘ Fig 13. Simple loop filter for PC2 with damping 9. Limiting values Table 3. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). ...
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... NXP Semiconductors 10. Recommended operating conditions Table 4. Operating conditions Symbol Parameter V supply voltage CC V input voltage I V output voltage O T ambient temperature amb t/ V input transition rise and fall rate 11. Static characteristics Table 5. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). ...
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... NXP Semiconductors Table 5. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter V HIGH-level output voltage OH V LOW-level output voltage OL I input leakage current I R1 resistor 1 R2 resistor 2 C1 capacitor 1 V voltage on pin VCO_IN VCO_IN Demodulator section R series resistance ...
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... NXP Semiconductors Table 5. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter V HIGH-level output voltage OH V LOW-level output voltage OL I input leakage current I I OFF-state output current OZ VCO section V HIGH-level input voltage IH V LOW-level input voltage IL V HIGH-level output voltage ...
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... NXP Semiconductors Table 5. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter V HIGH-level output voltage OH V LOW-level output voltage OL I input leakage current I I OFF-state output current OZ VCO section V HIGH-level input voltage IH V LOW-level input voltage IL V HIGH-level output voltage ...
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... NXP Semiconductors Fig 14. Typical input resistance curve at SIG_IN and COMP_IN 4 0.25 0 Fig 16. Input current at SIG_IN; COMP_IN with self-bias point I 74HCT9046A_6 Product data sheet mbd108 self-bias operating point (0 Fig 15. Input resistance at SIG_IN; COMP_IN with mga957 = 5.5V V offset (mV) 4 ...
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... NXP Semiconductors 12. Dynamic characteristics Table 6. Dynamic characteristics GND = ns pF Symbol Parameter amb Phase comparator section t propagation delay pd t enable time en t disable time dis t transition time t V peak-to-peak input voltage i(p-p) VCO section f frequency deviation f center frequency 0 f/f relative frequency variation ...
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... NXP Semiconductors Table 6. Dynamic characteristics GND = ns pF Symbol Parameter f/ T frequency variation with temperature +125 C amb Phase comparator section t propagation delay pd t enable time en t disable time dis t transition time t [ the same as t and PLH PHL [ used to determine the dynamic power dissipation (P ...
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... NXP Semiconductors SIG_IN input COMP_IN input PC2_OUT output GND Fig 19. Waveforms showing the enable and disable times for PC2_OUT 20 f (%) 100 pF. Fig 20. Frequency stability of the VCO as a function of ambient temperature with supply voltage as a parameter 74HCT9046A_6 Product data sheet PHZ ...
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... NXP Semiconductors 10 f (%) 300 Fig 21. Frequency stability of the VCO as a function of ambient temperature with supply voltage as a parameter 8 f (%) 100 pF. Fig 22. Frequency stability of the VCO as a function of ambient temperature with supply voltage as a parameter 74HCT9046A_6 Product data sheet mbd124 5 (%) 4.5 V 100 ...
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... NXP Semiconductors 30 f VCO (MHz pF. 800 f VCO (kHz 5 600 4.5 V 400 200 300 pF. Fig 23. Graphs showing VCO frequency as a function of the VCO input voltage (V 74HCT9046A_6 Product data sheet mbd112 30 f VCO (kHz (V) VCO_IN b. mbd120 400 f VCO (Hz) 300 200 100 ...
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... NXP Semiconductors f (MHz min 0 f‘ = ----------------- - 0 2 f‘ – ----------------- - linearity = 100 % f 0 Fig 24. Definition of VCO frequency linearity 0.5 V over the 5 100 R2 = Fig 26. Power dissipation as a function of R1 74HCT9046A_6 Product data sheet f VCO mga937 (%) V max V (V) VCO_IN Fig 25. Frequency linearity as a function of R1, C1 and ...
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... NXP Semiconductors Fig 28. Typical power dissipation as a function of R 74HCT9046A_6 Product data sheet DEM ( 4 5 Rev. 06 — 15 September 2009 74HCT9046A PLL with band gap controlled VCO mbd109 © NXP B.V. 2009. All rights reserved ...
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... NXP Semiconductors 13. Application information This information is a guide for the approximation of values of external components to be used with the 74HCT9046A in a phase-locked-loop system. Values of the selected components should be within the ranges shown in Table 7. Survey of components Component Table 8. Design considerations for VCO section ...
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... NXP Semiconductors f VCO f max min a. Operating without offset VCO f max min f off b. Operating with offset Fig 29. Frequency characteristic of VCO 74HCT9046A_6 Product data sheet 1 center frequency frequency lock range 0.6f L 0 center frequency frequency lock range. L Rev. 06 — 15 September 2009 ...
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... NXP Semiconductors 13.1 Filter design considerations for PC1 and PC2 of the 74HCT9046A Figure 30 comparators of the 74HCT9046A. Transfer functions of phase comparators and filters are given in Table 9. Transfer functions of phase comparators and filters Phase Explanation comparator PC1 ---------- - V /r PC1 = gain amplitude ...
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... NXP Semiconductors PC1 CIRCUIT PC2 R3' R4 AR3 R3' A Fig 30. Passive and active filters for 74HCT9046A 74HCT9046A_6 Product data sheet AMPLITUDE CHARACTERISTIC ( ( ( 1 1/A 1 (e) Rev. 06 — 15 September 2009 74HCT9046A PLL with band gap controlled VCO POLE ZERO DIAGRAM mbd107 © NXP B.V. 2009. All rights reserved. ...
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... NXP Semiconductors 150 4 150 5 300 4 300 0.5V VCO_IN CC Fig 31. Typical value of VCO center frequency (f 74HCT9046A_6 Product data sheet (Hz INH = GND amb ) as a function Rev. 06 — 15 September 2009 74HCT9046A PLL with band gap controlled VCO mbd103 (1) (2) (3) (4) (5) (6) ...
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... NXP Semiconductors 150 4 5 300 0.5V VCO_IN CC Fig 32. Typical value of frequency offset as a function --------------------------------------- - range VCO_IN 1.1) V VCO_IN CC Fig 33. Typical frequency lock range 2f 74HCT9046A_6 Product data sheet off (Hz INH = GND amb (Hz function of the product R1 and C1 L Rev. 06 — 15 September 2009 ...
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... NXP Semiconductors 13.2 PLL design example The frequency synthesizer used in the design example shown in following parameters: Output frequency: 2 MHz to 3 MHz Frequency steps: 100 kHz Settling time Overshoot: < The open loop gain is: H (s) G(s) and the closed loop: u ------ - = ------------------------------------------------------- - ...
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... NXP Semiconductors K = ----------- - p 4 Using PC2 with the passive filter as shown in same performance as a loop with an active filter. Hence loop filter equations as for a high gain loop should be used. The current source output of PC2 can be simulated then with a fictive filter resistance: R3‘ = The transfer functions of the filter is given by: ...
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... NXP Semiconductors Rewriting the equation for natural frequency results in -------------------------------- - 1 The maximum overshoot occurs at N 0.4 2. -------------------------------------- - 1 When C2 = 470 nF, it follows: R3‘ = Hence the current source bias resistance R = bias With = 0.707 (0.5 = ------------------------- 2 0.5 5000 R4 = ------ - C2 For extra ripple suppression a capacitor C3 can be connected in parallel with R4, with an ...
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... NXP Semiconductors OSCILLATOR DIVIDE BY 10 "HCU04" "190" 1 MHz (1) R3’ = fictive resistance R bias ------------ R3’ 100 470 R3' = 2550 bias R4 = 600 Fig 34. Frequency synthesizer 1.6 1.4 ( 1.2 = 5.0 1.0 0.8 0.6 0.4 0 Fig 35. Type 2, second order frequency step response 74HCT9046A_6 Product data sheet ...
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... NXP Semiconductors proportional Fig 36. Frequency compared to the time response Since the output frequency is proportional to the VCO control voltage, the PLL frequency response can be observed with an oscilloscope by monitoring pin VCO_IN of the VCO. The average frequency response, as calculated by the Laplace method, is found experimentally by smoothing this voltage at pin VCO_IN with a simple RC filter, whose time constant is long compared with the phase detector sampling rate but short compared with the PLL response time ...
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... NXP Semiconductors 14. Package outline DIP16: plastic dual in-line package; 16 leads (300 mil pin 1 index 1 DIMENSIONS (inch dimensions are derived from the original mm dimensions UNIT max. min. max. mm 4.2 0.51 3.2 inches 0.17 0.02 0.13 Note 1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included. ...
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... NXP Semiconductors SO16: plastic small outline package; 16 leads; body width 3 pin 1 index 1 DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT max. 0.25 1.45 mm 1.75 0.25 0.10 1.25 0.010 0.057 inches 0.069 0.01 0.004 0.049 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. ...
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... NXP Semiconductors TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4 pin 1 index 1 DIMENSIONS (mm are the original dimensions) A UNIT max. 0.15 0.95 mm 1.1 0.25 0.05 0.80 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. ...
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... Document ID Release date 74HCT9046A_6 20090915 • Modifications: The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. • Legal texts have been adapted to the new company name where appropriate. • V • • Package version SOT38-1 changed to SOT38-4 in ...
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... Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...
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... NXP Semiconductors 19. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 4 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 5 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3 6 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 3 7 Pinning information . . . . . . . . . . . . . . . . . . . . . . 5 7.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 7.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 5 8 Functional description . . . . . . . . . . . . . . . . . . . 6 8.1 Differences with respect to the familiar 74HCT4046A . . . . . . . . . . . . . . . . . . . . . . . . . . 6 8.2 VCO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 8.3 Phase comparators ...