ICS810251AGILF IDT, Integrated Device Technology Inc, ICS810251AGILF Datasheet - Page 9

• Manufacturer Part Number: ICS810251AGILF
• Description: IC VCXO SYNC ETH ATTEN 16-TSSOP
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: HiPerClockS™r
• Type: Jitter Attenuator, Voltage Controlled Crystal Oscillator (VCXO)r

Specifications of ICS810251AGILF

• Pll: Yes with Bypass
• Input: Clock
• Output: LVCMOS, LVTTL
• Number Of Circuits: 1
• Ratio - Input:output: 1:1
• Differential - Input:output: No/No
• Frequency - Max: 25MHz
• Divider/multiplier: Yes/No
• Voltage - Supply: 2.375 V ~ 3.465 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 16-TSSOP
• Frequency-max: 25MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 810251AGILF

ICS810251I Data Sheet
Schematic Example
Figure 1 shows an example of the 810251I application schematic. In
this example, the device is operated either at V
decoupling capacitors should be located as close as possible to the
power pin. The input is driven by an LVCMOS driver. An optional
Figure 1. P.C. ICS810251I Schematic Example
ICS810251AGI REVISION A JULY 28, 2009
SPARE
SPARE
C5
C6
3-pole loop filter example - (optional)
TBD
LF0
Rs
TBD
Cs
X2
LVCMOS_Driv er
Q1
TBD
10uF
R1
Cp
Rs
1K
Cs
2-pole loop filter
R3
TBD
33
XTAL_IN
TBD
XTAL_OUT
Zo = 50
C3
LF1
0.001 uF
Cp
DD
= 3.3V or 2.5V. The
VDD
C4
0.1u
10
11
12
13
14
15
16
9
U1
GND
XTAL_OUT
XTAL_IN
GND
LF0
LF1
VDD
CLK_IN
Logic Control Input Examples
VDD
RU1
1K
RD1
Not Install
9
3-pole filter can also be used for additional spur reduction. It is
recommended that the loop filter components be laid out for the
3-pole option. This will also allow the 2-pole filter to be used.
Set Logic
Input to
'1'
To Logic
Input
pins
Reserv ed
PLL_SEL
VDDO
VDDA
C1
0.1u
GND
VDD
OE
Q
VDD
VDD
VCXO AND SYNCHRONOUS ETHERNET JITTER ATTENUATOR
8
7
6
5
4
3
2
1
RU2
Not Install
RD2
1K
Set Logic
Input to
'0'
To Logic
Input
pins
VDDO
R4
0.1u
C2
C30
0.01u
©2009 Integrated Device Technology, Inc.
33
VDD=VDDO=3.3V
VDDA
Zo = 50
R2
C45
10u
LVCMOS_Receiv er
10
VDD