IDT82V3001APVG IDT, Integrated Device Technology Inc, IDT82V3001APVG Datasheet - Page 3

• Manufacturer Part Number: IDT82V3001APVG
• Description: IC PLL WAN W/SGL REF INP 56-SSOP
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: PLL Clock Generatorr
• Series: -r

Specifications of IDT82V3001APVG

• Input: CMOS, TTL
• Output: CMOS, TTL
• Frequency - Max: 32.768MHz
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 56-SSOP
• Frequency-max: 32.768MHz
• Function: Wan PLL
• Operating Temperature (max): 85C
• Operating Temperature (min): -40C
• Package Type: SSOP
• Pin Count: 56
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Compliant, Lead free / RoHS Compliant
• Other names: 82V3001APVG

Table Of Contents
1 IDT82V3001A PIN CONFIGURATION........................................................................................................................... 6
2 PIN DESCRIPTION ........................................................................................................................................................ 7
3 FUNCTIONAL DESCRIPTION..................................................................................................................................... 10
4 MEASURES OF PERFORMANCE .............................................................................................................................. 17
5 TEST SPECIFICATIONS ............................................................................................................................................. 19
6 TIMING CHARACTERISTICS...................................................................................................................................... 24
7 ORDERING INFORMATION ........................................................................................................................................ 28
3.1 State Control Circuit............................................................................................................................................. 10
3.2 Frequency Select Circuit...................................................................................................................................... 12
3.3 Invalid Input Signal Detection .............................................................................................................................. 12
3.4 TIE Control Block................................................................................................................................................. 12
3.5 DPLL Block .......................................................................................................................................................... 14
3.6 OSC ..................................................................................................................................................................... 15
3.7 JTAG.................................................................................................................................................................... 15
3.8 Reset Circuit ........................................................................................................................................................ 15
3.9 Power Supply Filtering Techniques ..................................................................................................................... 16
4.1 Intrinsic Jitter........................................................................................................................................................ 17
4.2 Jitter Tolerance .................................................................................................................................................... 17
4.3 Jitter Transfer....................................................................................................................................................... 17
4.4 Frequency Accuracy ............................................................................................................................................17
4.5 Holdover Accuracy............................................................................................................................................... 17
4.6 Capture Range .................................................................................................................................................... 17
4.7 Lock Range.......................................................................................................................................................... 17
4.8 Phase Slope ........................................................................................................................................................ 17
4.9 Time Interval Error (TIE) ...................................................................................................................................... 17
4.10 Maximum Time Interval Error (MTIE) .................................................................................................................. 17
4.11 Phase Continuity.................................................................................................................................................. 17
4.12 Phase Lock Time ................................................................................................................................................. 18
5.1 AC Electrical Characteristics**............................................................................................................................. 20
3.1.1 Normal Mode ............................................................................................................................................11
3.1.2 Fast Lock Mode ........................................................................................................................................ 11
3.1.3 Holdover Mode ......................................................................................................................................... 11
3.1.4 Freerun Mode ........................................................................................................................................... 12
3.5.1 Phase Detector (PHD) .............................................................................................................................. 14
3.5.2 Limiter ....................................................................................................................................................... 14
3.5.3 Loop Filter................................................................................................................................................. 14
3.5.4 Fraction Block ........................................................................................................................................... 15
3.5.5 Digital Control Oscillator (DCO)................................................................................................................ 15
3.5.6 Lock Indicator ........................................................................................................................................... 15
3.5.7 Output Interface ........................................................................................................................................ 15
3.6.1 Clock Oscillator......................................................................................................................................... 15
TABLE OF CONTENTS
3
October 15, 2008