ICS814252CKI-02LFT IDT, Integrated Device Technology Inc, ICS814252CKI-02LFT Datasheet - Page 10

• Manufacturer Part Number: ICS814252CKI-02LFT
• Description: IC VCXO/FEMTOCLK 2LVDS 32-VFQFPN
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: HiPerClockS™, FemtoClock®r
• Type: Frequency Translator, Jitter Attenuator, Voltage Controlled Crystal Oscillator (VCXO)r

Specifications of ICS814252CKI-02LFT

• Pll: Yes
• Input: HCSL, LVDS, LVHSTL, LVPECL, SSTL
• Output: LVDS
• Number Of Circuits: 1
• Ratio - Input:output: 3:2
• Differential - Input:output: Yes/Yes
• Frequency - Max: 312.5MHz
• Divider/multiplier: Yes/Yes
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 32-VFQFN
• Frequency-max: 312.5MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 814252CKI-02LFT

F
D
The CLK /nCLK accepts LVDS, LVPECL, LVHSTL, SSTL, HCSL
and other differential signals. Both signals must meet the V
V
for the HiPerClockS CLK/nCLK input driven by the most common
driver types. The input interfaces suggested here are examples
F
F
IDT
IGURE
CMR
IGURE
IGURE
IFFERENTIAL
ICS813252I-02
VCXO JITTER ATTENUATOR & FEMTOCLOCK™ MULTIPLIER
™
2.5V
input requirements. Figures 3A to 3F show interface examples
/ ICS
HCSL
3.3V
3C. H
3A. H
3E. H
*Optional – R3 and R4 can be 0Ω
1.8V
™
LVPECL
VCXO JITTER ATTENUATOR/MULTIPLIER
LVHSTL
ICS
HiPerClockS
LVHSTL Driver
D
D
H
D
*R3
*R4
I
RIVEN BY A
I
RIVEN BY AN
I
I
RIVEN BY A
P
P
P
P
C
ER
ER
ER
ER
Zo = 50 Ohm
Zo = 50 Ohm
LOCK
C
Zo = 50 Ohm
Zo = 50 Ohm
33
33
C
C
C
LOCK
LOCK
LOCK
LOCK
I
NPUT
Zo = 50Ω
Zo = 50Ω
S CLK/nCLK I
3.3V LVPECL D
S CLK/nCLK I
S LVHSTL D
3.3V HCSL D
S CLK/nCLK I
IDT O
R1
50
3.3V
R3
125
I
NTERFACE
R1
84
R1
50
PEN
R2
50
R4
125
R2
84
E
MITTER
RIVER
CLK
nCLK
R2
50
RIVER
NPUT
NPUT
CLK
nCLK
NPUT
3.3V
RIVER
3.3V
CLK
nCLK
HiPerClockS
Input
HiPerClockS
Input
3.3V
HiPerClockS
Input
PP
and
10
only. Please consult with the vendor of the driver component to
confirm the driver termination requirements. For example in Figure
3A, the input termination applies for IDT HiPerClockS open emitter
LVHSTL drivers. If you are using an LVHSTL driver from another
vendor, use their termination recommendation.
F
F
F
IGURE
IGURE
IGURE
2.5V
3.3V
3.3V
SSTL
3D. H
3B. H
LVDS_Driv er
3F. H
LVPECL
D
D
D
I
RIVEN BY A
I
RIVEN BY A
I
RIVEN BY A
P
P
P
Zo = 50 Ohm
Zo = 50 Ohm
ER
ER
ER
Zo = 60Ω
Zo = 60Ω
C
C
C
LOCK
LOCK
LOCK
Zo = 50 Ohm
Zo = 50 Ohm
ICS813252CKI-02 REV. A OCTOBER 5, 2007
3.3V LVDS D
3.3V LVPECL D
S CLK/nCLK I
2.5V SSTL D
S CLK/nCLK I
S CLK/nCLK I
R1
50
R3
120
R3
50
2.5V
R1
120
R2
50
R1
100
R4
120
CLK
nCLK
R2
120
3.3V
RIVER
RIVER
NPUT
NPUT
NPUT
HiPerClockS
RIVER
Input
CLK
nCLK
PRELIMINARY
CLK
nCLK
3.3V
3.3V
HiPerClockS
Receiv er